diff options
| author | Craig Topper <craig.topper@intel.com> | 2018-05-01 04:42:00 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-05-01 04:42:00 +0000 |
| commit | 33dc01d105c08644c5b08c8c37879c6528edfdea (patch) | |
| tree | 06696b6d0b3ccd641ccab9067d7788dc21437a8f /llvm/test | |
| parent | 09a1a39874d49c5a237c99a48757a5a49a3b011f (diff) | |
| download | bcm5719-llvm-33dc01d105c08644c5b08c8c37879c6528edfdea.tar.gz bcm5719-llvm-33dc01d105c08644c5b08c8c37879c6528edfdea.zip | |
[X86] Remove 'opaque ptr' from the intel syntax parser and printer.
Previously for instructions like fxsave we would print "opaque ptr" as part of the memory operand. Now we print nothing.
We also no longer accept "opaque ptr" in the parser. We still accept any size to be specified for these instructions, but we may want to consider only parsing when no explicit size is specified. This what gas does.
llvm-svn: 331243
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/Disassembler/X86/intel-syntax-32.txt | 8 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/X86/intel-syntax.txt | 6 | ||||
| -rw-r--r-- | llvm/test/MC/X86/intel-syntax.s | 4 |
3 files changed, 9 insertions, 9 deletions
diff --git a/llvm/test/MC/Disassembler/X86/intel-syntax-32.txt b/llvm/test/MC/Disassembler/X86/intel-syntax-32.txt index b47c8dbf0b6..e12e1f46992 100644 --- a/llvm/test/MC/Disassembler/X86/intel-syntax-32.txt +++ b/llvm/test/MC/Disassembler/X86/intel-syntax-32.txt @@ -1,15 +1,15 @@ # RUN: llvm-mc --disassemble %s -triple=i386 --output-asm-variant=1 | FileCheck %s -# CHECK: sgdtd opaque ptr [eax] +# CHECK: sgdtd [eax] 0x0f 0x01 0x00 -# CHECK: sidtd opaque ptr [eax] +# CHECK: sidtd [eax] 0x0f 0x01 0x08 -# CHECK: lgdtd opaque ptr [eax] +# CHECK: lgdtd [eax] 0x0f 0x01 0x10 -# CHECK: lidtd opaque ptr [eax] +# CHECK: lidtd [eax] 0x0f 0x01 0x18 # CHECK: mov al, byte ptr [878082192] diff --git a/llvm/test/MC/Disassembler/X86/intel-syntax.txt b/llvm/test/MC/Disassembler/X86/intel-syntax.txt index 17d9d53e418..d2f2490c79e 100644 --- a/llvm/test/MC/Disassembler/X86/intel-syntax.txt +++ b/llvm/test/MC/Disassembler/X86/intel-syntax.txt @@ -114,13 +114,13 @@ # CHECK: vpgatherdd xmm10, xmmword ptr [r15 + 2*xmm9], xmm8 0xc4 0x02 0x39 0x90 0x14 0x4f -# CHECK: xsave64 opaque ptr [rax] +# CHECK: xsave64 [rax] 0x48 0x0f 0xae 0x20 -# CHECK: xrstor64 opaque ptr [rax] +# CHECK: xrstor64 [rax] 0x48 0x0f 0xae 0x28 -# CHECK: xsaveopt64 opaque ptr [rax] +# CHECK: xsaveopt64 [rax] 0x48 0x0f 0xae 0x30 # CHECK: movabs al, byte ptr [-6066930261531658096] diff --git a/llvm/test/MC/X86/intel-syntax.s b/llvm/test/MC/X86/intel-syntax.s index aae21e0639a..ee78e71f0fc 100644 --- a/llvm/test/MC/X86/intel-syntax.s +++ b/llvm/test/MC/X86/intel-syntax.s @@ -664,8 +664,8 @@ fdivr ST(1) // CHECK: fxsave64 (%rax) // CHECK: fxrstor64 (%rax) -fxsave64 opaque ptr [rax] -fxrstor64 opaque ptr [rax] +fxsave64 [rax] +fxrstor64 [rax] .bss .globl _g0 |
