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| author | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-10-17 05:24:44 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel_l_sanders@apple.com> | 2017-10-17 05:24:44 +0000 |
| commit | 3229217620f536df68c4ab1bb4888370eef0458f (patch) | |
| tree | 4d320bcb04c4b2fe3bf1e4b007f13657849f94bb /llvm/test | |
| parent | 341f2ab4448cbf90576536040e5545cfa5319c4a (diff) | |
| download | bcm5719-llvm-3229217620f536df68c4ab1bb4888370eef0458f.tar.gz bcm5719-llvm-3229217620f536df68c4ab1bb4888370eef0458f.zip | |
[globalisel][tablegen] Add a GIM_CheckIsSameOperand test where OtherInsnID and OtherOpIdx differ
llvm-svn: 315972
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/GlobalISel/select-blsi.mir | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-blsi.mir b/llvm/test/CodeGen/X86/GlobalISel/select-blsi.mir new file mode 100644 index 00000000000..ec590010e49 --- /dev/null +++ b/llvm/test/CodeGen/X86/GlobalISel/select-blsi.mir @@ -0,0 +1,61 @@ +# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+bmi -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s +# +# Test that rules where multiple operands must be the same operand successfully +# match. Also test that the rules do not match when they're not the same +# operand. +# +# This test covers the case when OtherInsnID and OtherOpIdx are different in a +# GIM_CheckIsSameOperand. + +--- +name: test_blsi32rr +# CHECK-LABEL: name: test_blsi32rr +alignment: 4 +legalized: true +regBankSelected: true +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: gr32, preferred-register: '' } +# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' } +# CHECK-NEXT: - { id: 2, class: gpr, preferred-register: '' } +# CHECK-NEXT: - { id: 3, class: gr32, preferred-register: '' } +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } +# G_SUB and G_AND both use %0 so we should match this. +# CHECK: %3 = BLSI32rr %0 +body: | + bb.1: + liveins: %edi + + %0(s32) = COPY %edi + %1(s32) = G_CONSTANT i32 0 + %2(s32) = G_SUB %1, %0 + %3(s32) = G_AND %2, %0 + %edi = COPY %3 + +... +--- +name: test_blsi32rr_nomatch +# CHECK-LABEL: name: test_blsi32rr_nomatch +alignment: 4 +legalized: true +regBankSelected: true +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } +# G_SUB and G_AND use different operands so we shouldn't match this. +# CHECK-NOT: BLSI32rr +body: | + bb.1: + liveins: %edi + + %0(s32) = COPY %edi + %1(s32) = G_CONSTANT i32 0 + %2(s32) = G_SUB %1, %1 + %3(s32) = G_AND %2, %0 + %edi = COPY %3 +... |
