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| author | Gabor Buella <gabor.buella@intel.com> | 2018-04-20 18:42:47 +0000 |
|---|---|---|
| committer | Gabor Buella <gabor.buella@intel.com> | 2018-04-20 18:42:47 +0000 |
| commit | 31fa8025ba5143cdb2804e637dd5f3e3cd2e1c26 (patch) | |
| tree | d0e705effe28d87ac92e45b03d56ec179279fb2f /llvm/test | |
| parent | 041eb6fef6ac824f5a903be971067b269fcead1f (diff) | |
| download | bcm5719-llvm-31fa8025ba5143cdb2804e637dd5f3e3cd2e1c26.tar.gz bcm5719-llvm-31fa8025ba5143cdb2804e637dd5f3e3cd2e1c26.zip | |
[X86] WaitPKG instructions
Three new instructions:
umonitor - Sets up a linear address range to be
monitored by hardware and activates the monitor.
The address range should be a writeback memory
caching type.
umwait - A hint that allows the processor to
stop instruction execution and enter an
implementation-dependent optimized state
until occurrence of a class of events.
tpause - Directs the processor to enter an
implementation-dependent optimized state
until the TSC reaches the value in EDX:EAX.
Also modifying the description of the mfence
instruction, as the rep prefix (0xF3) was allowed
before, which would conflict with umonitor during
disassembly.
Before:
$ echo 0xf3,0x0f,0xae,0xf0 | llvm-mc -disassemble
.text
mfence
After:
$ echo 0xf3,0x0f,0xae,0xf0 | llvm-mc -disassemble
.text
umonitor %rax
Reviewers: craig.topper, zvi
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D45253
llvm-svn: 330462
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/waitpkg-intrinsics.ll | 67 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/X86/x86-16.txt | 6 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/X86/x86-32.txt | 12 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/X86/x86-64.txt | 15 | ||||
| -rw-r--r-- | llvm/test/MC/X86/x86-16.s | 8 | ||||
| -rw-r--r-- | llvm/test/MC/X86/x86-32-coverage.s | 16 | ||||
| -rw-r--r-- | llvm/test/MC/X86/x86-64.s | 28 |
7 files changed, 152 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/waitpkg-intrinsics.ll b/llvm/test/CodeGen/X86/waitpkg-intrinsics.ll new file mode 100644 index 00000000000..c0be395aa66 --- /dev/null +++ b/llvm/test/CodeGen/X86/waitpkg-intrinsics.ll @@ -0,0 +1,67 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=x86_64-linux -mattr=+waitpkg | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=i386-pc-linux -mattr=+waitpkg | FileCheck %s --check-prefix=X32 + +define void @test_umonitor(i8* %address) { +; X64-LABEL: test_umonitor: +; X64: # %bb.0: # %entry +; X64-NEXT: umonitor %rdi +; X64-NEXT: retq +; +; X32-LABEL: test_umonitor: +; X32: # %bb.0: # %entry +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: umonitor %eax +; X32-NEXT: retl +entry: + call void @llvm.x86.umonitor(i8* %address) + ret void +} + +define i8 @test_umwait(i32 %control, i32 %counter_high, i32 %counter_low) { +; X64-LABEL: test_umwait: +; X64: # %bb.0: # %entry +; X64-NEXT: movl %edx, %eax +; X64-NEXT: movl %esi, %edx +; X64-NEXT: umwait %edi +; X64-NEXT: setb %al +; X64-NEXT: retq +; +; X32-LABEL: test_umwait: +; X32: # %bb.0: # %entry +; X32-NEXT: movl {{[0-9]+}}(%esp), %edx +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: umwait %ecx +; X32-NEXT: setb %al +; X32-NEXT: retl +entry: + call i8 @llvm.x86.umwait(i32 %control, i32 %counter_high, i32 %counter_low) + ret i8 %0 +} + +define i8 @test_tpause(i32 %control, i32 %counter_high, i32 %counter_low) { +; X64-LABEL: test_tpause: +; X64: # %bb.0: # %entry +; X64-NEXT: movl %edx, %eax +; X64-NEXT: movl %esi, %edx +; X64-NEXT: tpause %edi +; X64-NEXT: setb %al +; X64-NEXT: retq +; +; X32-LABEL: test_tpause: +; X32: # %bb.0: # %entry +; X32-NEXT: movl {{[0-9]+}}(%esp), %edx +; X32-NEXT: movl {{[0-9]+}}(%esp), %eax +; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X32-NEXT: tpause %ecx +; X32-NEXT: setb %al +; X32-NEXT: retl +entry: + call i8 @llvm.x86.tpause(i32 %control, i32 %counter_high, i32 %counter_low) + ret i8 %0 +} + +declare void @llvm.x86.umonitor(i8*) +declare i8 @llvm.x86.umwait(i32, i32, i32) +declare i8 @llvm.x86.tpause(i32, i32, i32) diff --git a/llvm/test/MC/Disassembler/X86/x86-16.txt b/llvm/test/MC/Disassembler/X86/x86-16.txt index 60341ad61f0..cf534351157 100644 --- a/llvm/test/MC/Disassembler/X86/x86-16.txt +++ b/llvm/test/MC/Disassembler/X86/x86-16.txt @@ -794,3 +794,9 @@ # CHECK: wbnoinvd 0xf3 0x0f 0x09 + +# CHECK: umonitor %ax +0xf3 0x0f 0xae 0xf0 + +# CHECK: umonitor %eax +0x67 0xf3 0x0f 0xae 0xf0 diff --git a/llvm/test/MC/Disassembler/X86/x86-32.txt b/llvm/test/MC/Disassembler/X86/x86-32.txt index f4adf9f0d5e..20a82b5a582 100644 --- a/llvm/test/MC/Disassembler/X86/x86-32.txt +++ b/llvm/test/MC/Disassembler/X86/x86-32.txt @@ -847,3 +847,15 @@ 0x0f 0xb7 0x00 # CHECK: movzww (%eax), %ax 0x66 0x0f 0xb7 0x00 + +# CHECK: umonitor %eax +0xf3 0x0f 0xae 0xf0 + +# CHECK: umonitor %ax +0x67 0xf3 0x0f 0xae 0xf0 + +# CHECK: umwait %eax +0xf2 0x0f 0xae 0xf0 + +# CHECK: tpause %eax +0x66 0x0f 0xae 0xf0 diff --git a/llvm/test/MC/Disassembler/X86/x86-64.txt b/llvm/test/MC/Disassembler/X86/x86-64.txt index f066feead4d..eeba5e3f9de 100644 --- a/llvm/test/MC/Disassembler/X86/x86-64.txt +++ b/llvm/test/MC/Disassembler/X86/x86-64.txt @@ -525,3 +525,18 @@ # CHECK: cldemote -559038737(%rbx,%rcx,8) 0x0f,0x1c,0x84,0xcb,0xef,0xbe,0xad,0xde + +# CHECK: umonitor %rax +0xf3 0x0f 0xae 0xf0 + +# CHECK: umonitor %eax +0x67 0xf3 0x0f 0xae 0xf0 + +# CHECK: umonitor %r13 +0xf3 0x41 0x0f 0xae 0xf5 + +# CHECK: umwait %r15 +0xf2 0x41 0x0f 0xae 0xf7 + +# CHECK: tpause %r15 +0x66 0x41 0x0f 0xae 0xf7 diff --git a/llvm/test/MC/X86/x86-16.s b/llvm/test/MC/X86/x86-16.s index b890be30500..7326c2a9bfa 100644 --- a/llvm/test/MC/X86/x86-16.s +++ b/llvm/test/MC/X86/x86-16.s @@ -973,3 +973,11 @@ data32 lgdt 4(%eax) // CHECK: wbnoinvd // CHECK: encoding: [0xf3,0x0f,0x09] wbnoinvd + +// CHECK: umonitor %ax +// CHECK: encoding: [0xf3,0x0f,0xae,0xf0] +umonitor %ax + +// CHECK: umonitor %eax +// CHECK: encoding: [0x67,0xf3,0x0f,0xae,0xf0] +umonitor %eax diff --git a/llvm/test/MC/X86/x86-32-coverage.s b/llvm/test/MC/X86/x86-32-coverage.s index 65ea392fa72..79dc2e506ef 100644 --- a/llvm/test/MC/X86/x86-32-coverage.s +++ b/llvm/test/MC/X86/x86-32-coverage.s @@ -10752,3 +10752,19 @@ btcl $4, (%eax) // CHECK: cldemote 3735928559(%ebx,%ecx,8) // CHECK: encoding: [0x0f,0x1c,0x84,0xcb,0xef,0xbe,0xad,0xde] cldemote 0xdeadbeef(%ebx,%ecx,8) + +// CHECK: umonitor %eax +// CHECK: encoding: [0xf3,0x0f,0xae,0xf0] + umonitor %eax + +// CHECK: umonitor %ax +// CHECK: encoding: [0x67,0xf3,0x0f,0xae,0xf0] + umonitor %ax + +// CHECK: umwait %eax +// CHECK: encoding: [0xf2,0x0f,0xae,0xf0] + umwait %eax + +// CHECK: tpause %eax +// CHECK: encoding: [0x66,0x0f,0xae,0xf0] + tpause %eax diff --git a/llvm/test/MC/X86/x86-64.s b/llvm/test/MC/X86/x86-64.s index ea5be29cbfc..31e8888f398 100644 --- a/llvm/test/MC/X86/x86-64.s +++ b/llvm/test/MC/X86/x86-64.s @@ -1571,6 +1571,34 @@ cldemote 4(%rax) // CHECK: encoding: [0x0f,0x1c,0x84,0xcb,0xef,0xbe,0xad,0xde] cldemote 0xdeadbeef(%rbx,%rcx,8) +// CHECK: umonitor %r13 +// CHECK: encoding: [0xf3,0x41,0x0f,0xae,0xf5] +umonitor %r13 + +// CHECK: umonitor %rax +// CHECK: encoding: [0xf3,0x0f,0xae,0xf0] +umonitor %rax + +// CHECK: umonitor %eax +// CHECK: encoding: [0x67,0xf3,0x0f,0xae,0xf0] +umonitor %eax + +// CHECK: umwait %r15 +// CHECK: encoding: [0xf2,0x41,0x0f,0xae,0xf7] +umwait %r15 + +// CHECK: umwait %ebx +// CHECK: encoding: [0xf2,0x0f,0xae,0xf3] +umwait %ebx + +// CHECK: tpause %r15 +// CHECK: encoding: [0x66,0x41,0x0f,0xae,0xf7] +tpause %r15 + +// CHECK: tpause %ebx +// CHECK: encoding: [0x66,0x0f,0xae,0xf3] +tpause %ebx + // __asm __volatile( // "pushf \n\t" // "popf \n\t" |

