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author | Zia Ansari <zia.ansari@intel.com> | 2016-02-15 23:44:13 +0000 |
---|---|---|
committer | Zia Ansari <zia.ansari@intel.com> | 2016-02-15 23:44:13 +0000 |
commit | 30a02384f7b8dc07479e5df16ddf93056750062a (patch) | |
tree | ee790c2bf4956042cce138820f70d869df6ca717 /llvm/test | |
parent | 6ada31c2a686eb7647134c910e716b6a3509d64d (diff) | |
download | bcm5719-llvm-30a02384f7b8dc07479e5df16ddf93056750062a.tar.gz bcm5719-llvm-30a02384f7b8dc07479e5df16ddf93056750062a.zip |
Implemented stack symbol table ordering/packing optimization to improve data locality and code size from SP/FP offset encoding.
Differential Revision: http://reviews.llvm.org/D15393
llvm-svn: 260917
Diffstat (limited to 'llvm/test')
20 files changed, 213 insertions, 29 deletions
diff --git a/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll b/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll index 2abb5ba7cd5..5a5a6eed741 100644 --- a/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll +++ b/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -; RUN: llc < %s -march=x86-64 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -verify-machineinstrs | FileCheck %s ; PR3538 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9" diff --git a/llvm/test/CodeGen/X86/aligned-variadic.ll b/llvm/test/CodeGen/X86/aligned-variadic.ll index 29415922062..1ea57296a70 100644 --- a/llvm/test/CodeGen/X86/aligned-variadic.ll +++ b/llvm/test/CodeGen/X86/aligned-variadic.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=X64 -; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-apple-darwin -stack-symbol-ordering=0 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=i686-apple-darwin -stack-symbol-ordering=0 | FileCheck %s -check-prefix=X32 %struct.Baz = type { [17 x i8] } %struct.__va_list_tag = type { i32, i32, i8*, i8* } diff --git a/llvm/test/CodeGen/X86/avx512-mask-op.ll b/llvm/test/CodeGen/X86/avx512-mask-op.ll index 7ae6c8a0efa..66307cd9f2c 100644 --- a/llvm/test/CodeGen/X86/avx512-mask-op.ll +++ b/llvm/test/CodeGen/X86/avx512-mask-op.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX +; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL +; RUN: llc < %s -stack-symbol-ordering=0 -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX define i16 @mask16(i16 %x) { ; CHECK-LABEL: mask16: diff --git a/llvm/test/CodeGen/X86/cleanuppad-realign.ll b/llvm/test/CodeGen/X86/cleanuppad-realign.ll index 5a565cc1570..314d5da07d7 100644 --- a/llvm/test/CodeGen/X86/cleanuppad-realign.ll +++ b/llvm/test/CodeGen/X86/cleanuppad-realign.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=i686-pc-windows-msvc < %s | FileCheck --check-prefix=X86 %s -; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s | FileCheck --check-prefix=X64 %s +; RUN: llc -mtriple=i686-pc-windows-msvc -stack-symbol-ordering=0 < %s | FileCheck --check-prefix=X86 %s +; RUN: llc -mtriple=x86_64-pc-windows-msvc -stack-symbol-ordering=0 < %s | FileCheck --check-prefix=X64 %s declare i32 @__CxxFrameHandler3(...) declare void @Dtor(i64* %o) diff --git a/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll b/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll index b0334d6a63e..7e30192c65b 100644 --- a/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll +++ b/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mcpu=generic -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s -; RUN: llc < %s -mcpu=generic -stackrealign -stack-alignment=32 -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s -check-prefix=FORCE-ALIGN +; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s +; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -stackrealign -stack-alignment=32 -march=x86-64 -mattr=+avx -mtriple=i686-apple-darwin10 | FileCheck %s -check-prefix=FORCE-ALIGN ; rdar://11496434 ; no VLAs or dynamic alignment diff --git a/llvm/test/CodeGen/X86/hipe-cc.ll b/llvm/test/CodeGen/X86/hipe-cc.ll index e3808e75422..efea8967b75 100644 --- a/llvm/test/CodeGen/X86/hipe-cc.ll +++ b/llvm/test/CodeGen/X86/hipe-cc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -tailcallopt -code-model=medium -stack-alignment=4 -mtriple=i686-linux-gnu -mcpu=pentium | FileCheck %s +; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -stack-alignment=4 -mtriple=i686-linux-gnu -mcpu=pentium | FileCheck %s ; Check the HiPE calling convention works (x86-32) diff --git a/llvm/test/CodeGen/X86/hipe-cc64.ll b/llvm/test/CodeGen/X86/hipe-cc64.ll index 28d90399d85..0df4b3daad1 100644 --- a/llvm/test/CodeGen/X86/hipe-cc64.ll +++ b/llvm/test/CodeGen/X86/hipe-cc64.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -tailcallopt -code-model=medium -stack-alignment=8 -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s +; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -stack-alignment=8 -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s ; Check the HiPE calling convention works (x86-64) diff --git a/llvm/test/CodeGen/X86/local_stack_symbol_ordering.ll b/llvm/test/CodeGen/X86/local_stack_symbol_ordering.ll new file mode 100644 index 00000000000..998c14565ce --- /dev/null +++ b/llvm/test/CodeGen/X86/local_stack_symbol_ordering.ll @@ -0,0 +1,184 @@ +; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s -check-prefix=X32 + +; CHECK-LABEL: foo + +; Check the functionality of the local stack symbol table ordering +; heuristics. +; The test has a bunch of locals of various sizes that are referenced a +; different number of times. +; +; a : 120B, 9 uses, density = 0.075 +; aa : 4000B, 1 use, density = 0.00025 +; b : 4B, 1 use, density = 0.25 +; cc : 4000B, 2 uses density = 0.0005 +; d : 4B, 2 uses density = 0.5 +; e : 4B, 3 uses density = 0.75 +; f : 4B, 4 uses density = 1 +; +; Given the size, number of uses and calculated density (uses / size), we're +; going to hope that f gets allocated closest to the stack pointer, +; followed by e, d, b, then a (to check for just a few). +; We use gnu-inline asm between calls to prevent registerization of addresses +; so that we get exact counts. +; +; The test is taken from something like this: +; void foo() +; { +; int f; // 4 uses. 4 / 4 = 1 +; int a[30]; // 9 uses. 8 / 120 = 0.06 +; int aa[1000]; // 1 use. 1 / 4000 = +; int e; // 3 uses. 3 / 4 = 0.75 +; int cc[1000]; // 2 uses. 2 / 4000 = +; int b; // 1 use. 1 / 4 = 0.25 +; int d; // 2 uses. 2 / 4 = 0.5 +; int aaa[1000]; // 2 uses. 2 / 4000 +; +; +; check_a(&a); +; bar1(&aaa); +; asm ("":::"esi","edi","ebp","ebx","rbx","r12","r13","r14","r15","rbp"); +; bar1(&a); +; check_f(&f); +; asm ("":::"esi","edi","ebp","ebx","rbx","r12","r13","r14","r15","rbp"); +; bar1(&a); +; bar3(&aa, &aaa, &cc); +; asm ("":::"esi","edi","ebp","ebx","rbx","r12","r13","r14","r15","rbp"); +; bar2(&a,&cc); +; check_b(&b); +; asm ("":::"esi","edi","ebp","ebx","rbx","r12","r13","r14","r15","rbp"); +; bar1(&a); +; asm ("":::"esi","edi","ebp","ebx","rbx","r12","r13","r14","r15","rbp"); +; bar2(&a, &f); +; check_e(&e); +; asm ("":::"esi","edi","ebp","ebx","rbx","r12","r13","r14","r15","rbp"); +; bar1(&a); +; asm ("":::"esi","edi","ebp","ebx","rbx","r12","r13","r14","r15","rbp"); +; bar2(&e, &f); +; check_d(&d); +; bar1(&a); +; asm ("":::"esi","edi","ebp","ebx","rbx","r12","r13","r14","r15","rbp"); +; bar3(&d, &e, &f); +; asm ("":::"esi","edi","ebp","ebx","rbx","r12","r13","r14","r15","rbp"); +; bar1(&a); +; } +; +; X64: leaq 16(%rsp), %rdi +; X64: callq check_a +; X64: callq bar1 +; X64: callq bar1 +; X64: leaq (%rsp), %rdi +; X64: callq check_f +; X64: callq bar1 +; X64: callq bar3 +; X64: callq bar2 +; X64: leaq 12(%rsp), %rdi +; X64: callq check_b +; X64: callq bar1 +; X64: callq bar2 +; X64: leaq 4(%rsp), %rdi +; X64: callq check_e +; X64: callq bar1 +; X64: callq bar2 +; X64: leaq 8(%rsp), %rdi +; X64: callq check_d + +; X32: leal 32(%esp) +; X32: calll check_a +; X32: calll bar1 +; X32: calll bar1 +; X32: leal 16(%esp) +; X32: calll check_f +; X32: calll bar1 +; X32: calll bar3 +; X32: calll bar2 +; X32: leal 28(%esp) +; X32: calll check_b +; X32: calll bar1 +; X32: calll bar2 +; X32: leal 20(%esp) +; X32: calll check_e +; X32: calll bar1 +; X32: calll bar2 +; X32: leal 24(%esp) +; X32: calll check_d + + +define void @foo() nounwind uwtable { +entry: + %f = alloca i32, align 4 + %a = alloca [30 x i32], align 16 + %aa = alloca [1000 x i32], align 16 + %e = alloca i32, align 4 + %cc = alloca [1000 x i32], align 16 + %b = alloca i32, align 4 + %d = alloca i32, align 4 + %aaa = alloca [1000 x i32], align 16 + %0 = bitcast i32* %f to i8* + call void @llvm.lifetime.start(i64 4, i8* %0) #1 + %1 = bitcast [30 x i32]* %a to i8* + call void @llvm.lifetime.start(i64 120, i8* %1) #1 + %2 = bitcast [1000 x i32]* %aa to i8* + call void @llvm.lifetime.start(i64 4000, i8* %2) #1 + %3 = bitcast i32* %e to i8* + call void @llvm.lifetime.start(i64 4, i8* %3) #1 + %4 = bitcast [1000 x i32]* %cc to i8* + call void @llvm.lifetime.start(i64 4000, i8* %4) #1 + %5 = bitcast i32* %b to i8* + call void @llvm.lifetime.start(i64 4, i8* %5) #1 + %6 = bitcast i32* %d to i8* + call void @llvm.lifetime.start(i64 4, i8* %6) #1 + %7 = bitcast [1000 x i32]* %aaa to i8* + call void @llvm.lifetime.start(i64 4000, i8* %7) #1 + %call = call i32 ([30 x i32]*, ...) bitcast (i32 (...)* @check_a to i32 ([30 x i32]*, ...)*)([30 x i32]* %a) + %call1 = call i32 ([1000 x i32]*, ...) bitcast (i32 (...)* @bar1 to i32 ([1000 x i32]*, ...)*)([1000 x i32]* %aaa) + call void asm sideeffect "", "~{esi},~{edi},~{ebp},~{ebx},~{rbx},~{r12},~{r13},~{r14},~{r15},~{rbp},~{dirflag},~{fpsr},~{flags}"() #1 + %call2 = call i32 ([30 x i32]*, ...) bitcast (i32 (...)* @bar1 to i32 ([30 x i32]*, ...)*)([30 x i32]* %a) + %call3 = call i32 (i32*, ...) bitcast (i32 (...)* @check_f to i32 (i32*, ...)*)(i32* %f) + call void asm sideeffect "", "~{esi},~{edi},~{ebp},~{ebx},~{rbx},~{r12},~{r13},~{r14},~{r15},~{rbp},~{dirflag},~{fpsr},~{flags}"() #1 + %call4 = call i32 ([30 x i32]*, ...) bitcast (i32 (...)* @bar1 to i32 ([30 x i32]*, ...)*)([30 x i32]* %a) + %call5 = call i32 ([1000 x i32]*, [1000 x i32]*, [1000 x i32]*, ...) bitcast (i32 (...)* @bar3 to i32 ([1000 x i32]*, [1000 x i32]*, [1000 x i32]*, ...)*)([1000 x i32]* %aa, [1000 x i32]* %aaa, [1000 x i32]* %cc) + call void asm sideeffect "", "~{esi},~{edi},~{ebp},~{ebx},~{rbx},~{r12},~{r13},~{r14},~{r15},~{rbp},~{dirflag},~{fpsr},~{flags}"() #1 + %call6 = call i32 ([30 x i32]*, [1000 x i32]*, ...) bitcast (i32 (...)* @bar2 to i32 ([30 x i32]*, [1000 x i32]*, ...)*)([30 x i32]* %a, [1000 x i32]* %cc) + %call7 = call i32 (i32*, ...) bitcast (i32 (...)* @check_b to i32 (i32*, ...)*)(i32* %b) + call void asm sideeffect "", "~{esi},~{edi},~{ebp},~{ebx},~{rbx},~{r12},~{r13},~{r14},~{r15},~{rbp},~{dirflag},~{fpsr},~{flags}"() #1 + %call8 = call i32 ([30 x i32]*, ...) bitcast (i32 (...)* @bar1 to i32 ([30 x i32]*, ...)*)([30 x i32]* %a) + call void asm sideeffect "", "~{esi},~{edi},~{ebp},~{ebx},~{rbx},~{r12},~{r13},~{r14},~{r15},~{rbp},~{dirflag},~{fpsr},~{flags}"() #1 + %call9 = call i32 ([30 x i32]*, i32*, ...) bitcast (i32 (...)* @bar2 to i32 ([30 x i32]*, i32*, ...)*)([30 x i32]* %a, i32* %f) + %call10 = call i32 (i32*, ...) bitcast (i32 (...)* @check_e to i32 (i32*, ...)*)(i32* %e) + call void asm sideeffect "", "~{esi},~{edi},~{ebp},~{ebx},~{rbx},~{r12},~{r13},~{r14},~{r15},~{rbp},~{dirflag},~{fpsr},~{flags}"() #1 + %call11 = call i32 ([30 x i32]*, ...) bitcast (i32 (...)* @bar1 to i32 ([30 x i32]*, ...)*)([30 x i32]* %a) + call void asm sideeffect "", "~{esi},~{edi},~{ebp},~{ebx},~{rbx},~{r12},~{r13},~{r14},~{r15},~{rbp},~{dirflag},~{fpsr},~{flags}"() #1 + %call12 = call i32 (i32*, i32*, ...) bitcast (i32 (...)* @bar2 to i32 (i32*, i32*, ...)*)(i32* %e, i32* %f) + %call13 = call i32 (i32*, ...) bitcast (i32 (...)* @check_d to i32 (i32*, ...)*)(i32* %d) + %call14 = call i32 ([30 x i32]*, ...) bitcast (i32 (...)* @bar1 to i32 ([30 x i32]*, ...)*)([30 x i32]* %a) + call void asm sideeffect "", "~{esi},~{edi},~{ebp},~{ebx},~{rbx},~{r12},~{r13},~{r14},~{r15},~{rbp},~{dirflag},~{fpsr},~{flags}"() #1 + %call15 = call i32 (i32*, i32*, i32*, ...) bitcast (i32 (...)* @bar3 to i32 (i32*, i32*, i32*, ...)*)(i32* %d, i32* %e, i32* %f) + call void asm sideeffect "", "~{esi},~{edi},~{ebp},~{ebx},~{rbx},~{r12},~{r13},~{r14},~{r15},~{rbp},~{dirflag},~{fpsr},~{flags}"() #1 + %call16 = call i32 ([30 x i32]*, ...) bitcast (i32 (...)* @bar1 to i32 ([30 x i32]*, ...)*)([30 x i32]* %a) + call void @llvm.lifetime.end(i64 4000, i8* %7) #1 + call void @llvm.lifetime.end(i64 4, i8* %6) #1 + call void @llvm.lifetime.end(i64 4, i8* %5) #1 + call void @llvm.lifetime.end(i64 4000, i8* %4) #1 + call void @llvm.lifetime.end(i64 4, i8* %3) #1 + call void @llvm.lifetime.end(i64 4000, i8* %2) #1 + call void @llvm.lifetime.end(i64 120, i8* %1) #1 + call void @llvm.lifetime.end(i64 4, i8* %0) #1 + ret void +} + +; Function Attrs: nounwind +declare void @llvm.lifetime.start(i64, i8* nocapture) #1 + +declare i32 @check_a(...) #2 +declare i32 @bar1(...) #2 +declare i32 @check_f(...) #2 +declare i32 @bar3(...) #2 +declare i32 @bar2(...) #2 +declare i32 @check_b(...) #2 +declare i32 @check_e(...) #2 +declare i32 @check_d(...) #2 + +; Function Attrs: nounwind +declare void @llvm.lifetime.end(i64, i8* nocapture) #1 + diff --git a/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll b/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll index a0adba0f833..b1fc7ac5459 100644 --- a/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll +++ b/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -optimize-regalloc=0 | FileCheck %s -; RUN: llc -O0 < %s -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast | FileCheck %s -; RUN: llc < %s -march=x86 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -optimize-regalloc=0 | FileCheck -check-prefix=ATOM %s +; RUN: llc < %s -stack-symbol-ordering=0 -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -optimize-regalloc=0 | FileCheck %s +; RUN: llc -O0 < %s -stack-symbol-ordering=0 -march=x86 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast | FileCheck %s +; RUN: llc < %s -stack-symbol-ordering=0 -march=x86 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -optimize-regalloc=0 | FileCheck -check-prefix=ATOM %s ; CHECKed instructions should be the same with or without -O0 except on Intel Atom due to instruction scheduling. @.str = private constant [12 x i8] c"x + y = %i\0A\00", align 1 ; <[12 x i8]*> [#uses=1] diff --git a/llvm/test/CodeGen/X86/seh-catch-all-win32.ll b/llvm/test/CodeGen/X86/seh-catch-all-win32.ll index b895e11e4b3..1195bbedd8f 100644 --- a/llvm/test/CodeGen/X86/seh-catch-all-win32.ll +++ b/llvm/test/CodeGen/X86/seh-catch-all-win32.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=i686-windows-msvc < %s | FileCheck %s +; RUN: llc -stack-symbol-ordering=0 -mtriple=i686-windows-msvc < %s | FileCheck %s ; 32-bit catch-all has to use a filter function because that's how it saves the ; exception code. diff --git a/llvm/test/CodeGen/X86/seh-stack-realign.ll b/llvm/test/CodeGen/X86/seh-stack-realign.ll index 654cad347f6..a2eb3bc53b7 100644 --- a/llvm/test/CodeGen/X86/seh-stack-realign.ll +++ b/llvm/test/CodeGen/X86/seh-stack-realign.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=i686-windows-msvc < %s | FileCheck %s +; RUN: llc -stack-symbol-ordering=0 -mtriple=i686-windows-msvc < %s | FileCheck %s ; 32-bit catch-all has to use a filter function because that's how it saves the ; exception code. diff --git a/llvm/test/CodeGen/X86/ssp-data-layout.ll b/llvm/test/CodeGen/X86/ssp-data-layout.ll index 4a63aceb7cc..e954d9c1042 100644 --- a/llvm/test/CodeGen/X86/ssp-data-layout.ll +++ b/llvm/test/CodeGen/X86/ssp-data-layout.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -disable-fp-elim -mtriple=x86_64-pc-linux-gnu -mcpu=corei7 -o - | FileCheck %s +; RUN: llc < %s -stack-symbol-ordering=0 -disable-fp-elim -mtriple=x86_64-pc-linux-gnu -mcpu=corei7 -o - | FileCheck %s ; This test is fairly fragile. The goal is to ensure that "large" stack ; objects are allocated closest to the stack protector (i.e., farthest away ; from the Stack Pointer.) In standard SSP mode this means that large (>= diff --git a/llvm/test/CodeGen/X86/statepoint-stack-usage.ll b/llvm/test/CodeGen/X86/statepoint-stack-usage.ll index d4784212810..d4bc7d47f66 100644 --- a/llvm/test/CodeGen/X86/statepoint-stack-usage.ll +++ b/llvm/test/CodeGen/X86/statepoint-stack-usage.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -stack-symbol-ordering=0 < %s | FileCheck %s target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-pc-linux-gnu" diff --git a/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll b/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll index 9632360d723..2b1357a1179 100644 --- a/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll +++ b/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple="x86_64-pc-linux-gnu" | FileCheck %s -; RUN: llc < %s -mtriple="x86_64-pc-unknown-elf" | FileCheck %s +; RUN: llc < %s -stack-symbol-ordering=0 -mtriple="x86_64-pc-linux-gnu" | FileCheck %s +; RUN: llc < %s -stack-symbol-ordering=0 -mtriple="x86_64-pc-unknown-elf" | FileCheck %s ; This test is a sanity check to ensure statepoints are generating StackMap ; sections correctly. This is not intended to be a rigorous test of the diff --git a/llvm/test/CodeGen/X86/statepoint-vector.ll b/llvm/test/CodeGen/X86/statepoint-vector.ll index 9d80e9217b4..6290c9e87d4 100644 --- a/llvm/test/CodeGen/X86/statepoint-vector.ll +++ b/llvm/test/CodeGen/X86/statepoint-vector.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=core-avx -debug-only=stackmaps < %s | FileCheck %s +; RUN: llc -stack-symbol-ordering=0 -mcpu=core-avx -debug-only=stackmaps < %s | FileCheck %s ; REQUIRES: asserts target triple = "x86_64-pc-linux-gnu" diff --git a/llvm/test/CodeGen/X86/stdarg.ll b/llvm/test/CodeGen/X86/stdarg.ll index 42cbcb1008d..7b4f4e845fc 100644 --- a/llvm/test/CodeGen/X86/stdarg.ll +++ b/llvm/test/CodeGen/X86/stdarg.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc -stack-symbol-ordering=0 < %s -mtriple=x86_64-linux | FileCheck %s %struct.__va_list_tag = type { i32, i32, i8*, i8* } diff --git a/llvm/test/CodeGen/X86/widen_load-1.ll b/llvm/test/CodeGen/X86/widen_load-1.ll index c670b45df74..810e409c175 100644 --- a/llvm/test/CodeGen/X86/widen_load-1.ll +++ b/llvm/test/CodeGen/X86/widen_load-1.ll @@ -1,5 +1,5 @@ -; RUN: llc %s -o - -march=x86-64 -mattr=-avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=SSE -; RUN: llc %s -o - -march=x86-64 -mattr=+avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=AVX +; RUN: llc -stack-symbol-ordering=0 %s -o - -march=x86-64 -mattr=-avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=SSE +; RUN: llc -stack-symbol-ordering=0 %s -o - -march=x86-64 -mattr=+avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=AVX ; PR4891 ; PR5626 diff --git a/llvm/test/CodeGen/X86/win-catchpad-varargs.ll b/llvm/test/CodeGen/X86/win-catchpad-varargs.ll index 6508f3bd7d6..a31b3d72c56 100644 --- a/llvm/test/CodeGen/X86/win-catchpad-varargs.ll +++ b/llvm/test/CodeGen/X86/win-catchpad-varargs.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64 -; RUN: llc -mtriple=i686-windows-msvc < %s | FileCheck %s --check-prefix=X86 +; RUN: llc -stack-symbol-ordering=0 -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64 +; RUN: llc -stack-symbol-ordering=0 -mtriple=i686-windows-msvc < %s | FileCheck %s --check-prefix=X86 declare void @llvm.va_start(i8*) declare void @llvm.va_end(i8*) diff --git a/llvm/test/CodeGen/X86/win-catchpad.ll b/llvm/test/CodeGen/X86/win-catchpad.ll index 836c53bda8e..dc1490fadda 100644 --- a/llvm/test/CodeGen/X86/win-catchpad.ll +++ b/llvm/test/CodeGen/X86/win-catchpad.ll @@ -1,5 +1,5 @@ -; RUN: llc -verify-machineinstrs -mtriple=i686-pc-windows-msvc < %s | FileCheck --check-prefix=X86 %s -; RUN: llc -verify-machineinstrs -mtriple=x86_64-pc-windows-msvc < %s | FileCheck --check-prefix=X64 %s +; RUN: llc -stack-symbol-ordering=0 -verify-machineinstrs -mtriple=i686-pc-windows-msvc < %s | FileCheck --check-prefix=X86 %s +; RUN: llc -stack-symbol-ordering=0 -verify-machineinstrs -mtriple=x86_64-pc-windows-msvc < %s | FileCheck --check-prefix=X64 %s ; Loosely based on IR for this C++ source code: ; void f(int p); diff --git a/llvm/test/CodeGen/X86/win32-seh-catchpad-realign.ll b/llvm/test/CodeGen/X86/win32-seh-catchpad-realign.ll index 23aeea37c11..1ba0c1a0efe 100644 --- a/llvm/test/CodeGen/X86/win32-seh-catchpad-realign.ll +++ b/llvm/test/CodeGen/X86/win32-seh-catchpad-realign.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -stack-symbol-ordering=0 < %s | FileCheck %s ; The aligned alloca means that we have to realign the stack, which forces the ; use of ESI to address local variables. |