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| author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2018-04-06 17:25:00 +0000 |
|---|---|---|
| committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2018-04-06 17:25:00 +0000 |
| commit | 306b1a0119e6e92dcf37f51c77416129110a7c43 (patch) | |
| tree | 03c3578e5ce3f0609c402f03a2d5924c414c4a3f /llvm/test | |
| parent | a9ca709011d0621afa54fee11de39502db4b261b (diff) | |
| download | bcm5719-llvm-306b1a0119e6e92dcf37f51c77416129110a7c43.tar.gz bcm5719-llvm-306b1a0119e6e92dcf37f51c77416129110a7c43.zip | |
[AMDGPU][MC][GFX9] Added instruction s_endpgm_ordered_ps_done
See bug 36844: https://bugs.llvm.org/show_bug.cgi?id=36844
Differential Revision: https://reviews.llvm.org/D45313
Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 329430
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/AMDGPU/sopk.s | 14 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/AMDGPU/sopk_gfx9.txt | 4 |
2 files changed, 15 insertions, 3 deletions
diff --git a/llvm/test/MC/AMDGPU/sopk.s b/llvm/test/MC/AMDGPU/sopk.s index 1f7aeb9fc0b..35e6c579563 100644 --- a/llvm/test/MC/AMDGPU/sopk.s +++ b/llvm/test/MC/AMDGPU/sopk.s @@ -1,8 +1,12 @@ -// RUN: llvm-mc -arch=amdgcn -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=SICI %s -// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=SICI %s -// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=VI9 --check-prefix=VI %s +// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=SICI %s +// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=SICI %s +// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=VI9 --check-prefix=VI %s // RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=VI9 --check-prefix=GFX9 %s +// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=NOSICIVI %s +// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICIVI -check-prefix=NOSI %s +// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck -check-prefix=NOSICIVI -check-prefix=NOVI %s + //===----------------------------------------------------------------------===// // Instructions //===----------------------------------------------------------------------===// @@ -167,3 +171,7 @@ s_setreg_imm32_b32 0x6, 0xff s_setreg_imm32_b32 hwreg(HW_REG_GPR_ALLOC, 1, 31), 0xff // SICI: s_setreg_imm32_b32 hwreg(HW_REG_GPR_ALLOC, 1, 31), 0xff ; encoding: [0x45,0xf0,0x80,0xba,0xff,0x00,0x00,0x00] // VI9: s_setreg_imm32_b32 hwreg(HW_REG_GPR_ALLOC, 1, 31), 0xff ; encoding: [0x45,0xf0,0x00,0xba,0xff,0x00,0x00,0x00] + +s_endpgm_ordered_ps_done +// GFX9: s_endpgm_ordered_ps_done ; encoding: [0x00,0x00,0x9e,0xbf] +// NOSICIVI: error: instruction not supported on this GPU diff --git a/llvm/test/MC/Disassembler/AMDGPU/sopk_gfx9.txt b/llvm/test/MC/Disassembler/AMDGPU/sopk_gfx9.txt new file mode 100644 index 00000000000..1e7d8901b8b --- /dev/null +++ b/llvm/test/MC/Disassembler/AMDGPU/sopk_gfx9.txt @@ -0,0 +1,4 @@ +# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9 + +# GFX9: s_endpgm_ordered_ps_done ; encoding: [0x00,0x00,0x9e,0xbf] +0x00,0x00,0x9e,0xbf |
