diff options
author | Dan Gohman <dan433584@gmail.com> | 2016-05-10 17:39:48 +0000 |
---|---|---|
committer | Dan Gohman <dan433584@gmail.com> | 2016-05-10 17:39:48 +0000 |
commit | 2e64438ae403441378b4cc8ab08ecc67d399766b (patch) | |
tree | b34cb346d2a9edcfad9cc40f29a818456c6b2c0b /llvm/test | |
parent | 0f522a590377f56052a14aa2b1f3c3bc8af3a5fe (diff) | |
download | bcm5719-llvm-2e64438ae403441378b4cc8ab08ecc67d399766b.tar.gz bcm5719-llvm-2e64438ae403441378b4cc8ab08ecc67d399766b.zip |
[WebAssembly] Preliminary fast-isel support.
llvm-svn: 269083
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/cfg-stackify.ll | 7 | ||||
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/fast-isel.ll | 28 | ||||
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/load.ll | 1 | ||||
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/return-int32.ll | 1 | ||||
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/return-void.ll | 1 | ||||
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/store.ll | 1 | ||||
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/unreachable.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/WebAssembly/userstack.ll | 2 |
8 files changed, 38 insertions, 5 deletions
diff --git a/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll b/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll index 442d0d4ea25..b29cd8860a2 100644 --- a/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll +++ b/llvm/test/CodeGen/WebAssembly/cfg-stackify.ll @@ -1,8 +1,11 @@ -; RUN: llc < %s -asm-verbose=false -disable-block-placement -verify-machineinstrs | FileCheck %s -; RUN: llc < %s -asm-verbose=false -verify-machineinstrs | FileCheck -check-prefix=OPT %s +; RUN: llc < %s -asm-verbose=false -disable-block-placement -verify-machineinstrs -fast-isel=false | FileCheck %s +; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -fast-isel=false | FileCheck -check-prefix=OPT %s ; Test the CFG stackifier pass. +; Explicitly disable fast-isel, since it gets implicitly enabled in the +; optnone test. + target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" diff --git a/llvm/test/CodeGen/WebAssembly/fast-isel.ll b/llvm/test/CodeGen/WebAssembly/fast-isel.ll index 7f9f20fa708..d3ee77632bc 100644 --- a/llvm/test/CodeGen/WebAssembly/fast-isel.ll +++ b/llvm/test/CodeGen/WebAssembly/fast-isel.ll @@ -18,3 +18,31 @@ define float @immediate_f32() { define double @immediate_f64() { ret double 2.5 } + +; CHECK-LABEL: bitcast_i32_f32: +; CHECK: i32.reinterpret/f32 $push{{[0-9]+}}=, $0{{$}} +define i32 @bitcast_i32_f32(float %x) { + %y = bitcast float %x to i32 + ret i32 %y +} + +; CHECK-LABEL: bitcast_f32_i32: +; CHECK: f32.reinterpret/i32 $push{{[0-9]+}}=, $0{{$}} +define float @bitcast_f32_i32(i32 %x) { + %y = bitcast i32 %x to float + ret float %y +} + +; CHECK-LABEL: bitcast_i64_f64: +; CHECK: i64.reinterpret/f64 $push{{[0-9]+}}=, $0{{$}} +define i64 @bitcast_i64_f64(double %x) { + %y = bitcast double %x to i64 + ret i64 %y +} + +; CHECK-LABEL: bitcast_f64_i64: +; CHECK: f64.reinterpret/i64 $push{{[0-9]+}}=, $0{{$}} +define double @bitcast_f64_i64(i64 %x) { + %y = bitcast i64 %x to double + ret double %y +} diff --git a/llvm/test/CodeGen/WebAssembly/load.ll b/llvm/test/CodeGen/WebAssembly/load.ll index 243fa9d50ad..776dba36bf0 100644 --- a/llvm/test/CodeGen/WebAssembly/load.ll +++ b/llvm/test/CodeGen/WebAssembly/load.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -asm-verbose=false | FileCheck %s +; RUN: llc < %s -asm-verbose=false -fast-isel -fast-isel-abort=1 | FileCheck %s ; Test that basic loads are assembled properly. diff --git a/llvm/test/CodeGen/WebAssembly/return-int32.ll b/llvm/test/CodeGen/WebAssembly/return-int32.ll index a93a0f6c438..cbc9ec99703 100644 --- a/llvm/test/CodeGen/WebAssembly/return-int32.ll +++ b/llvm/test/CodeGen/WebAssembly/return-int32.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -asm-verbose=false | FileCheck %s +; RUN: llc < %s -asm-verbose=false -fast-isel -fast-isel-abort=1 | FileCheck %s target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" diff --git a/llvm/test/CodeGen/WebAssembly/return-void.ll b/llvm/test/CodeGen/WebAssembly/return-void.ll index 65ff5f32571..cf4d16858c0 100644 --- a/llvm/test/CodeGen/WebAssembly/return-void.ll +++ b/llvm/test/CodeGen/WebAssembly/return-void.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -asm-verbose=false | FileCheck %s +; RUN: llc < %s -asm-verbose=false -fast-isel -fast-isel-abort=1 | FileCheck %s target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" diff --git a/llvm/test/CodeGen/WebAssembly/store.ll b/llvm/test/CodeGen/WebAssembly/store.ll index dc93ebbbadb..a8c03325382 100644 --- a/llvm/test/CodeGen/WebAssembly/store.ll +++ b/llvm/test/CodeGen/WebAssembly/store.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -asm-verbose=false | FileCheck %s +; RUN: llc < %s -asm-verbose=false -fast-isel -fast-isel-abort=1 | FileCheck %s ; Test that basic stores are assembled properly. diff --git a/llvm/test/CodeGen/WebAssembly/unreachable.ll b/llvm/test/CodeGen/WebAssembly/unreachable.ll index 7b23bf3cecf..77fda44d5ff 100644 --- a/llvm/test/CodeGen/WebAssembly/unreachable.ll +++ b/llvm/test/CodeGen/WebAssembly/unreachable.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs | FileCheck %s -; RUN: llc < %s -asm-verbose=false -fast-isel -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -asm-verbose=false -fast-isel -fast-isel-abort=1 -verify-machineinstrs | FileCheck %s ; Test that LLVM unreachable instruction and trap intrinsic are lowered to ; wasm unreachable diff --git a/llvm/test/CodeGen/WebAssembly/userstack.ll b/llvm/test/CodeGen/WebAssembly/userstack.ll index e4ba583b2ac..a83ce531546 100644 --- a/llvm/test/CodeGen/WebAssembly/userstack.ll +++ b/llvm/test/CodeGen/WebAssembly/userstack.ll @@ -1,6 +1,4 @@ ; RUN: llc < %s -asm-verbose=false | FileCheck %s -; RUN: llc < %s -asm-verbose=false -fast-isel | FileCheck %s - target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" target triple = "wasm32-unknown-unknown" |