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| author | Adam Nemet <anemet@apple.com> | 2014-10-08 23:25:33 +0000 |
|---|---|---|
| committer | Adam Nemet <anemet@apple.com> | 2014-10-08 23:25:33 +0000 |
| commit | 2b5cdbb3de3c92faa2b63f33b8054060b5e363cd (patch) | |
| tree | 0f5458a4fe6b6e39342b2147d94d6f5f761c6b10 /llvm/test | |
| parent | 0937723b49904aeef8b7bdaea69193809b750375 (diff) | |
| download | bcm5719-llvm-2b5cdbb3de3c92faa2b63f33b8054060b5e363cd.tar.gz bcm5719-llvm-2b5cdbb3de3c92faa2b63f33b8054060b5e363cd.zip | |
[AVX512] Add asm-only support for vextract*x4 masking variants
These derive from the new asm-only masking definitions.
Unfortunately I wasn't able to find a ISel pattern that we could legally
generate for the masking variants. The problem is that since the destination
is v4* we would need VK4 register classes and v4i1 value types to express the
masking. These are however not legal types/classes in AVX512f but only in VL,
so things get complicated pretty quickly. We can revisit this question later
if we have a more pressing need to express something like this.
So the ISel patterns are empty for the masking instructions and the next patch
will add Pat<>s instead to match the intrinsics calls with instructions.
llvm-svn: 219361
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/X86/avx512-encodings.s | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/test/MC/X86/avx512-encodings.s b/llvm/test/MC/X86/avx512-encodings.s index 7e968b77fec..8326a7c9289 100644 --- a/llvm/test/MC/X86/avx512-encodings.s +++ b/llvm/test/MC/X86/avx512-encodings.s @@ -4335,3 +4335,11 @@ valignq $2, 0x100(%rsp), %zmm0, %zmm1 // CHECK: valignq $3 // CHECK: encoding: [0x62,0xf3,0xfd,0x49,0x03,0xcb,0x03] valignq $3, %zmm3, %zmm0, %zmm1 {%k1} + +// CHECK: vextractf32x4 $3 +// CHECK: encoding: [0x62,0xf3,0x7d,0x49,0x19,0xd9,0x03] +vextractf32x4 $3, %zmm3, %xmm1 {%k1} + +// CHECK: vextracti64x4 $1 +// CHECK: encoding: [0x62,0x53,0xfd,0xcb,0x3b,0xf4,0x01] +vextracti64x4 $1, %zmm14, %ymm12 {%k3} {z} |
