diff options
| author | Fangrui Song <maskray@google.com> | 2017-10-30 16:03:44 +0000 |
|---|---|---|
| committer | Fangrui Song <maskray@google.com> | 2017-10-30 16:03:44 +0000 |
| commit | 2696db90d1efa77c6857ceac645aa8fe9cebce6a (patch) | |
| tree | b0560445498ecb7b9f66df5760b3224adeff6a81 /llvm/test | |
| parent | 370331083496f9b8017eab44d1c67c9dd39fdfdd (diff) | |
| download | bcm5719-llvm-2696db90d1efa77c6857ceac645aa8fe9cebce6a.tar.gz bcm5719-llvm-2696db90d1efa77c6857ceac645aa8fe9cebce6a.zip | |
[PPC CodeGen] Fix the bitreverse.i64 intrinsic.
Summary: The two 32-bit words were swapped. Update a test omitted in reverted r316270.
Reviewers: jtony, aaron.ballman
Subscribers: nemanjai, kbarton
Differential Revision: https://reviews.llvm.org/D39163
llvm-svn: 316916
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/pr33093.ll | 32 | ||||
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/testBitReverse.ll | 32 |
2 files changed, 32 insertions, 32 deletions
diff --git a/llvm/test/CodeGen/PowerPC/pr33093.ll b/llvm/test/CodeGen/PowerPC/pr33093.ll index 5212973f831..fc28bcfd0ca 100644 --- a/llvm/test/CodeGen/PowerPC/pr33093.ll +++ b/llvm/test/CodeGen/PowerPC/pr33093.ll @@ -91,38 +91,38 @@ define i64 @ReverseBits64(i64 %n) { ; CHECK-NEXT: and 4, 8, 4 ; CHECK-NEXT: lis 7, 3855 ; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: oris 12, 5, 52428 -; CHECK-NEXT: oris 9, 6, 13107 +; CHECK-NEXT: oris 9, 5, 52428 +; CHECK-NEXT: oris 10, 6, 13107 ; CHECK-NEXT: lis 6, -3856 ; CHECK-NEXT: ori 7, 7, 3855 ; CHECK-NEXT: sldi 8, 3, 2 -; CHECK-NEXT: ori 4, 12, 52428 +; CHECK-NEXT: ori 4, 9, 52428 ; CHECK-NEXT: rldicl 3, 3, 62, 2 -; CHECK-NEXT: ori 5, 9, 13107 +; CHECK-NEXT: ori 5, 10, 13107 ; CHECK-NEXT: ori 6, 6, 61680 ; CHECK-NEXT: and 3, 3, 5 ; CHECK-NEXT: sldi 5, 6, 32 ; CHECK-NEXT: and 4, 8, 4 ; CHECK-NEXT: sldi 6, 7, 32 ; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: oris 10, 5, 61680 -; CHECK-NEXT: oris 11, 6, 3855 +; CHECK-NEXT: oris 11, 5, 61680 +; CHECK-NEXT: oris 12, 6, 3855 ; CHECK-NEXT: sldi 6, 3, 4 -; CHECK-NEXT: ori 4, 10, 61680 +; CHECK-NEXT: ori 4, 11, 61680 ; CHECK-NEXT: rldicl 3, 3, 60, 4 -; CHECK-NEXT: ori 5, 11, 3855 +; CHECK-NEXT: ori 5, 12, 3855 ; CHECK-NEXT: and 4, 6, 4 ; CHECK-NEXT: and 3, 3, 5 ; CHECK-NEXT: or 3, 3, 4 +; CHECK-NEXT: rlwinm 5, 3, 24, 0, 31 ; CHECK-NEXT: rldicl 4, 3, 32, 32 -; CHECK-NEXT: rlwinm 6, 3, 24, 0, 31 -; CHECK-NEXT: rlwinm 5, 4, 24, 0, 31 -; CHECK-NEXT: rlwimi 6, 3, 8, 8, 15 -; CHECK-NEXT: rlwimi 5, 4, 8, 8, 15 -; CHECK-NEXT: rlwimi 6, 3, 8, 24, 31 -; CHECK-NEXT: rlwimi 5, 4, 8, 24, 31 -; CHECK-NEXT: sldi 12, 5, 32 -; CHECK-NEXT: or 3, 12, 6 +; CHECK-NEXT: rlwinm 6, 4, 24, 0, 31 +; CHECK-NEXT: rlwimi 5, 3, 8, 8, 15 +; CHECK-NEXT: rlwimi 6, 4, 8, 8, 15 +; CHECK-NEXT: rlwimi 5, 3, 8, 24, 31 +; CHECK-NEXT: rlwimi 6, 4, 8, 24, 31 +; CHECK-NEXT: sldi 3, 5, 32 +; CHECK-NEXT: or 3, 3, 6 ; CHECK-NEXT: blr entry: %shr = lshr i64 %n, 1 diff --git a/llvm/test/CodeGen/PowerPC/testBitReverse.ll b/llvm/test/CodeGen/PowerPC/testBitReverse.ll index 6993d17ad8f..1508af9e4d0 100644 --- a/llvm/test/CodeGen/PowerPC/testBitReverse.ll +++ b/llvm/test/CodeGen/PowerPC/testBitReverse.ll @@ -67,38 +67,38 @@ define i64 @testBitReverseIntrinsicI64(i64 %arg) { ; CHECK-NEXT: and 4, 8, 4 ; CHECK-NEXT: lis 7, 3855 ; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: oris 12, 5, 52428 -; CHECK-NEXT: oris 9, 6, 13107 +; CHECK-NEXT: oris 9, 5, 52428 +; CHECK-NEXT: oris 10, 6, 13107 ; CHECK-NEXT: lis 6, -3856 ; CHECK-NEXT: ori 7, 7, 3855 ; CHECK-NEXT: sldi 8, 3, 2 -; CHECK-NEXT: ori 4, 12, 52428 +; CHECK-NEXT: ori 4, 9, 52428 ; CHECK-NEXT: rldicl 3, 3, 62, 2 -; CHECK-NEXT: ori 5, 9, 13107 +; CHECK-NEXT: ori 5, 10, 13107 ; CHECK-NEXT: ori 6, 6, 61680 ; CHECK-NEXT: and 3, 3, 5 ; CHECK-NEXT: sldi 5, 6, 32 ; CHECK-NEXT: and 4, 8, 4 ; CHECK-NEXT: sldi 6, 7, 32 ; CHECK-NEXT: or 3, 3, 4 -; CHECK-NEXT: oris 10, 5, 61680 -; CHECK-NEXT: oris 11, 6, 3855 +; CHECK-NEXT: oris 11, 5, 61680 +; CHECK-NEXT: oris 12, 6, 3855 ; CHECK-NEXT: sldi 6, 3, 4 -; CHECK-NEXT: ori 4, 10, 61680 +; CHECK-NEXT: ori 4, 11, 61680 ; CHECK-NEXT: rldicl 3, 3, 60, 4 -; CHECK-NEXT: ori 5, 11, 3855 +; CHECK-NEXT: ori 5, 12, 3855 ; CHECK-NEXT: and 4, 6, 4 ; CHECK-NEXT: and 3, 3, 5 ; CHECK-NEXT: or 3, 3, 4 +; CHECK-NEXT: rlwinm 5, 3, 24, 0, 31 ; CHECK-NEXT: rldicl 4, 3, 32, 32 -; CHECK-NEXT: rlwinm 6, 3, 24, 0, 31 -; CHECK-NEXT: rlwinm 5, 4, 24, 0, 31 -; CHECK-NEXT: rlwimi 6, 3, 8, 8, 15 -; CHECK-NEXT: rlwimi 5, 4, 8, 8, 15 -; CHECK-NEXT: rlwimi 6, 3, 8, 24, 31 -; CHECK-NEXT: rlwimi 5, 4, 8, 24, 31 -; CHECK-NEXT: sldi 12, 5, 32 -; CHECK-NEXT: or 3, 12, 6 +; CHECK-NEXT: rlwinm 6, 4, 24, 0, 31 +; CHECK-NEXT: rlwimi 5, 3, 8, 8, 15 +; CHECK-NEXT: rlwimi 6, 4, 8, 8, 15 +; CHECK-NEXT: rlwimi 5, 3, 8, 24, 31 +; CHECK-NEXT: rlwimi 6, 4, 8, 24, 31 +; CHECK-NEXT: sldi 3, 5, 32 +; CHECK-NEXT: or 3, 3, 6 ; CHECK-NEXT: blr %res = call i64 @llvm.bitreverse.i64(i64 %arg) ret i64 %res |

