diff options
author | Craig Topper <craig.topper@intel.com> | 2018-09-12 15:47:34 +0000 |
---|---|---|
committer | Craig Topper <craig.topper@intel.com> | 2018-09-12 15:47:34 +0000 |
commit | 226261353288e377e0f41223f4587d8ee5364f6d (patch) | |
tree | 59223f8002f44e8dbed2431bc7d81837fe662c24 /llvm/test | |
parent | a3d806504566d3363649f8d26395d52cdb9efe63 (diff) | |
download | bcm5719-llvm-226261353288e377e0f41223f4587d8ee5364f6d.tar.gz bcm5719-llvm-226261353288e377e0f41223f4587d8ee5364f6d.zip |
[X86] Remove isel patterns for ADCX instruction
There's no advantage to this instruction unless you need to avoid touching other flag bits. It's encoding is longer, it can't fold an immediate, it doesn't write all the flags.
I don't think gcc will generate this instruction either.
Fixes PR38852.
Differential Revision: https://reviews.llvm.org/D51754
llvm-svn: 342059
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll | 119 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/adx-intrinsics.ll | 163 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/pr32282.ll | 5 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/pr32284.ll | 23 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/stack-folding-adx-x86_64.ll | 11 |
5 files changed, 106 insertions, 215 deletions
diff --git a/llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll index 62f3997db95..fcb7165fb61 100644 --- a/llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll +++ b/llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll @@ -5,21 +5,13 @@ declare i8 @llvm.x86.addcarryx.u32(i8, i32, i32, i8*) define i8 @test_addcarryx_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarryx_u32: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcl %edx, %esi ## encoding: [0x11,0xd6] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarryx_u32: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxl %edx, %esi ## encoding: [0x66,0x0f,0x38,0xf6,0xf2] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarryx_u32: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcl %edx, %esi ## encoding: [0x11,0xd6] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] +; CHECK-NEXT: retq ## encoding: [0xc3] %ret = tail call i8 @llvm.x86.addcarryx.u32(i8 %c, i32 %a, i32 %b, i8* %ptr) ret i8 %ret; } @@ -27,21 +19,13 @@ define i8 @test_addcarryx_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { declare i8 @llvm.x86.addcarryx.u64(i8, i64, i64, i8*) define i8 @test_addcarryx_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarryx_u64: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcq %rdx, %rsi ## encoding: [0x48,0x11,0xd6] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarryx_u64: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxq %rdx, %rsi ## encoding: [0x66,0x48,0x0f,0x38,0xf6,0xf2] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarryx_u64: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcq %rdx, %rsi ## encoding: [0x48,0x11,0xd6] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] +; CHECK-NEXT: retq ## encoding: [0xc3] %ret = tail call i8 @llvm.x86.addcarryx.u64(i8 %c, i64 %a, i64 %b, i8* %ptr) ret i8 %ret; } @@ -49,21 +33,13 @@ define i8 @test_addcarryx_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { declare i8 @llvm.x86.addcarry.u32(i8, i32, i32, i8*) define i8 @test_addcarry_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarry_u32: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcl %edx, %esi ## encoding: [0x11,0xd6] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarry_u32: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxl %edx, %esi ## encoding: [0x66,0x0f,0x38,0xf6,0xf2] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarry_u32: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcl %edx, %esi ## encoding: [0x11,0xd6] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] +; CHECK-NEXT: retq ## encoding: [0xc3] %ret = tail call i8 @llvm.x86.addcarry.u32(i8 %c, i32 %a, i32 %b, i8* %ptr) ret i8 %ret; } @@ -71,21 +47,13 @@ define i8 @test_addcarry_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { declare i8 @llvm.x86.addcarry.u64(i8, i64, i64, i8*) define i8 @test_addcarry_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarry_u64: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcq %rdx, %rsi ## encoding: [0x48,0x11,0xd6] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarry_u64: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxq %rdx, %rsi ## encoding: [0x66,0x48,0x0f,0x38,0xf6,0xf2] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarry_u64: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcq %rdx, %rsi ## encoding: [0x48,0x11,0xd6] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] +; CHECK-NEXT: retq ## encoding: [0xc3] %ret = tail call i8 @llvm.x86.addcarry.u64(i8 %c, i64 %a, i64 %b, i8* %ptr) ret i8 %ret; } @@ -120,27 +88,16 @@ define i8 @test_subborrow_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { ; Try a version with loads. Previously we crashed on this. define i32 @load_crash(i64* nocapture readonly %a, i64* nocapture readonly %b, i64* %res) { -; NOADX-LABEL: load_crash: -; NOADX: ## %bb.0: -; NOADX-NEXT: movq (%rdi), %rax ## encoding: [0x48,0x8b,0x07] -; NOADX-NEXT: xorl %ecx, %ecx ## encoding: [0x31,0xc9] -; NOADX-NEXT: addb $-1, %cl ## encoding: [0x80,0xc1,0xff] -; NOADX-NEXT: adcq (%rsi), %rax ## encoding: [0x48,0x13,0x06] -; NOADX-NEXT: setb %cl ## encoding: [0x0f,0x92,0xc1] -; NOADX-NEXT: movq %rax, (%rdx) ## encoding: [0x48,0x89,0x02] -; NOADX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: load_crash: -; ADX: ## %bb.0: -; ADX-NEXT: movq (%rdi), %rax ## encoding: [0x48,0x8b,0x07] -; ADX-NEXT: xorl %ecx, %ecx ## encoding: [0x31,0xc9] -; ADX-NEXT: addb $-1, %cl ## encoding: [0x80,0xc1,0xff] -; ADX-NEXT: adcxq (%rsi), %rax ## encoding: [0x66,0x48,0x0f,0x38,0xf6,0x06] -; ADX-NEXT: setb %cl ## encoding: [0x0f,0x92,0xc1] -; ADX-NEXT: movq %rax, (%rdx) ## encoding: [0x48,0x89,0x02] -; ADX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: load_crash: +; CHECK: ## %bb.0: +; CHECK-NEXT: movq (%rdi), %rax ## encoding: [0x48,0x8b,0x07] +; CHECK-NEXT: xorl %ecx, %ecx ## encoding: [0x31,0xc9] +; CHECK-NEXT: addb $-1, %cl ## encoding: [0x80,0xc1,0xff] +; CHECK-NEXT: adcq (%rsi), %rax ## encoding: [0x48,0x13,0x06] +; CHECK-NEXT: setb %cl ## encoding: [0x0f,0x92,0xc1] +; CHECK-NEXT: movq %rax, (%rdx) ## encoding: [0x48,0x89,0x02] +; CHECK-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; CHECK-NEXT: retq ## encoding: [0xc3] %1 = load i64, i64* %a, align 8 %2 = load i64, i64* %b, align 8 %3 = bitcast i64* %res to i8* diff --git a/llvm/test/CodeGen/X86/adx-intrinsics.ll b/llvm/test/CodeGen/X86/adx-intrinsics.ll index 8ba35d16ea8..ba820d01f50 100644 --- a/llvm/test/CodeGen/X86/adx-intrinsics.ll +++ b/llvm/test/CodeGen/X86/adx-intrinsics.ll @@ -5,21 +5,13 @@ declare { i8, i32 } @llvm.x86.addcarryx.u32(i8, i32, i32) define i8 @test_addcarryx_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarryx_u32: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcl %edx, %esi ## encoding: [0x11,0xd6] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarryx_u32: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxl %edx, %esi ## encoding: [0x66,0x0f,0x38,0xf6,0xf2] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarryx_u32: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcl %edx, %esi ## encoding: [0x11,0xd6] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] +; CHECK-NEXT: retq ## encoding: [0xc3] %ret = call { i8, i32 } @llvm.x86.addcarryx.u32(i8 %c, i32 %a, i32 %b) %1 = extractvalue { i8, i32 } %ret, 1 %2 = bitcast i8* %ptr to i32* @@ -29,21 +21,13 @@ define i8 @test_addcarryx_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { } define i8 @test_addcarryx_u32_load(i8 %c, i32* %aptr, i32 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarryx_u32_load: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcl (%rsi), %edx ## encoding: [0x13,0x16] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: movl %edx, (%rcx) ## encoding: [0x89,0x11] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarryx_u32_load: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxl (%rsi), %edx ## encoding: [0x66,0x0f,0x38,0xf6,0x16] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: movl %edx, (%rcx) ## encoding: [0x89,0x11] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarryx_u32_load: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcl (%rsi), %edx ## encoding: [0x13,0x16] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: movl %edx, (%rcx) ## encoding: [0x89,0x11] +; CHECK-NEXT: retq ## encoding: [0xc3] %a = load i32, i32* %aptr %ret = call { i8, i32 } @llvm.x86.addcarryx.u32(i8 %c, i32 %a, i32 %b) %1 = extractvalue { i8, i32 } %ret, 1 @@ -54,21 +38,13 @@ define i8 @test_addcarryx_u32_load(i8 %c, i32* %aptr, i32 %b, i8* %ptr) { } define i8 @test_addcarryx_u32_load2(i8 %c, i32 %a, i32* %bptr, i8* %ptr) { -; NOADX-LABEL: test_addcarryx_u32_load2: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcl (%rdx), %esi ## encoding: [0x13,0x32] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarryx_u32_load2: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxl (%rdx), %esi ## encoding: [0x66,0x0f,0x38,0xf6,0x32] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarryx_u32_load2: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcl (%rdx), %esi ## encoding: [0x13,0x32] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] +; CHECK-NEXT: retq ## encoding: [0xc3] %b = load i32, i32* %bptr %ret = call { i8, i32 } @llvm.x86.addcarryx.u32(i8 %c, i32 %a, i32 %b) %1 = extractvalue { i8, i32 } %ret, 1 @@ -81,21 +57,13 @@ define i8 @test_addcarryx_u32_load2(i8 %c, i32 %a, i32* %bptr, i8* %ptr) { declare { i8, i64 } @llvm.x86.addcarryx.u64(i8, i64, i64) define i8 @test_addcarryx_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarryx_u64: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcq %rdx, %rsi ## encoding: [0x48,0x11,0xd6] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarryx_u64: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxq %rdx, %rsi ## encoding: [0x66,0x48,0x0f,0x38,0xf6,0xf2] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarryx_u64: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcq %rdx, %rsi ## encoding: [0x48,0x11,0xd6] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] +; CHECK-NEXT: retq ## encoding: [0xc3] %ret = call { i8, i64 } @llvm.x86.addcarryx.u64(i8 %c, i64 %a, i64 %b) %1 = extractvalue { i8, i64 } %ret, 1 %2 = bitcast i8* %ptr to i64* @@ -107,21 +75,13 @@ define i8 @test_addcarryx_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { declare { i8, i32 } @llvm.x86.addcarry.u32(i8, i32, i32) define i8 @test_addcarry_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarry_u32: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcl %edx, %esi ## encoding: [0x11,0xd6] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarry_u32: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxl %edx, %esi ## encoding: [0x66,0x0f,0x38,0xf6,0xf2] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarry_u32: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcl %edx, %esi ## encoding: [0x11,0xd6] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: movl %esi, (%rcx) ## encoding: [0x89,0x31] +; CHECK-NEXT: retq ## encoding: [0xc3] %ret = call { i8, i32 } @llvm.x86.addcarry.u32(i8 %c, i32 %a, i32 %b) %1 = extractvalue { i8, i32 } %ret, 1 %2 = bitcast i8* %ptr to i32* @@ -133,21 +93,13 @@ define i8 @test_addcarry_u32(i8 %c, i32 %a, i32 %b, i8* %ptr) { declare { i8, i64 } @llvm.x86.addcarry.u64(i8, i64, i64) define i8 @test_addcarry_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { -; NOADX-LABEL: test_addcarry_u64: -; NOADX: ## %bb.0: -; NOADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; NOADX-NEXT: adcq %rdx, %rsi ## encoding: [0x48,0x11,0xd6] -; NOADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; NOADX-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: test_addcarry_u64: -; ADX: ## %bb.0: -; ADX-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] -; ADX-NEXT: adcxq %rdx, %rsi ## encoding: [0x66,0x48,0x0f,0x38,0xf6,0xf2] -; ADX-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] -; ADX-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: test_addcarry_u64: +; CHECK: ## %bb.0: +; CHECK-NEXT: addb $-1, %dil ## encoding: [0x40,0x80,0xc7,0xff] +; CHECK-NEXT: adcq %rdx, %rsi ## encoding: [0x48,0x11,0xd6] +; CHECK-NEXT: setb %al ## encoding: [0x0f,0x92,0xc0] +; CHECK-NEXT: movq %rsi, (%rcx) ## encoding: [0x48,0x89,0x31] +; CHECK-NEXT: retq ## encoding: [0xc3] %ret = call { i8, i64 } @llvm.x86.addcarry.u64(i8 %c, i64 %a, i64 %b) %1 = extractvalue { i8, i64 } %ret, 1 %2 = bitcast i8* %ptr to i64* @@ -194,27 +146,16 @@ define i8 @test_subborrow_u64(i8 %c, i64 %a, i64 %b, i8* %ptr) { ; Try a version with loads. Previously we crashed on this. define i32 @load_crash(i64* nocapture readonly %a, i64* nocapture readonly %b, i64* %res) { -; NOADX-LABEL: load_crash: -; NOADX: ## %bb.0: -; NOADX-NEXT: movq (%rdi), %rax ## encoding: [0x48,0x8b,0x07] -; NOADX-NEXT: xorl %ecx, %ecx ## encoding: [0x31,0xc9] -; NOADX-NEXT: addb $-1, %cl ## encoding: [0x80,0xc1,0xff] -; NOADX-NEXT: adcq (%rsi), %rax ## encoding: [0x48,0x13,0x06] -; NOADX-NEXT: setb %cl ## encoding: [0x0f,0x92,0xc1] -; NOADX-NEXT: movq %rax, (%rdx) ## encoding: [0x48,0x89,0x02] -; NOADX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] -; NOADX-NEXT: retq ## encoding: [0xc3] -; -; ADX-LABEL: load_crash: -; ADX: ## %bb.0: -; ADX-NEXT: movq (%rdi), %rax ## encoding: [0x48,0x8b,0x07] -; ADX-NEXT: xorl %ecx, %ecx ## encoding: [0x31,0xc9] -; ADX-NEXT: addb $-1, %cl ## encoding: [0x80,0xc1,0xff] -; ADX-NEXT: adcxq (%rsi), %rax ## encoding: [0x66,0x48,0x0f,0x38,0xf6,0x06] -; ADX-NEXT: setb %cl ## encoding: [0x0f,0x92,0xc1] -; ADX-NEXT: movq %rax, (%rdx) ## encoding: [0x48,0x89,0x02] -; ADX-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] -; ADX-NEXT: retq ## encoding: [0xc3] +; CHECK-LABEL: load_crash: +; CHECK: ## %bb.0: +; CHECK-NEXT: movq (%rdi), %rax ## encoding: [0x48,0x8b,0x07] +; CHECK-NEXT: xorl %ecx, %ecx ## encoding: [0x31,0xc9] +; CHECK-NEXT: addb $-1, %cl ## encoding: [0x80,0xc1,0xff] +; CHECK-NEXT: adcq (%rsi), %rax ## encoding: [0x48,0x13,0x06] +; CHECK-NEXT: setb %cl ## encoding: [0x0f,0x92,0xc1] +; CHECK-NEXT: movq %rax, (%rdx) ## encoding: [0x48,0x89,0x02] +; CHECK-NEXT: movzbl %cl, %eax ## encoding: [0x0f,0xb6,0xc1] +; CHECK-NEXT: retq ## encoding: [0xc3] %1 = load i64, i64* %a, align 8 %2 = load i64, i64* %b, align 8 %3 = bitcast i64* %res to i8* diff --git a/llvm/test/CodeGen/X86/pr32282.ll b/llvm/test/CodeGen/X86/pr32282.ll index f5e4a0174ad..7ec6a5dbf7f 100644 --- a/llvm/test/CodeGen/X86/pr32282.ll +++ b/llvm/test/CodeGen/X86/pr32282.ll @@ -23,10 +23,9 @@ define void @foo() { ; X86-NEXT: shrdl $21, %ecx, %eax ; X86-NEXT: shrl $21, %ecx ; X86-NEXT: andl $-2, %eax -; X86-NEXT: xorl %edx, %edx ; X86-NEXT: addl $7, %eax -; X86-NEXT: adcxl %ecx, %edx -; X86-NEXT: pushl %edx +; X86-NEXT: adcl $0, %ecx +; X86-NEXT: pushl %ecx ; X86-NEXT: .cfi_adjust_cfa_offset 4 ; X86-NEXT: pushl %eax ; X86-NEXT: .cfi_adjust_cfa_offset 4 diff --git a/llvm/test/CodeGen/X86/pr32284.ll b/llvm/test/CodeGen/X86/pr32284.ll index 2ffb46209c3..ab6680cf45a 100644 --- a/llvm/test/CodeGen/X86/pr32284.ll +++ b/llvm/test/CodeGen/X86/pr32284.ll @@ -207,9 +207,8 @@ define void @f1() { ; 686-O0-NEXT: subl $-1, %esi ; 686-O0-NEXT: sete %bl ; 686-O0-NEXT: movzbl %bl, %edi -; 686-O0-NEXT: xorl %ebp, %ebp ; 686-O0-NEXT: addl $7093, %ecx # imm = 0x1BB5 -; 686-O0-NEXT: adcxl %ebp, %edx +; 686-O0-NEXT: adcl $0, %edx ; 686-O0-NEXT: subl %edi, %ecx ; 686-O0-NEXT: sbbl $0, %edx ; 686-O0-NEXT: setl %bl @@ -223,8 +222,8 @@ define void @f1() { ; 686-O0-NEXT: movl %ebp, _ZN8struct_210member_2_0E ; 686-O0-NEXT: movl $0, _ZN8struct_210member_2_0E+4 ; 686-O0-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill -; 686-O0-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; 686-O0-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill +; 686-O0-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; 686-O0-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill ; 686-O0-NEXT: movl %edi, (%esp) # 4-byte Spill ; 686-O0-NEXT: addl $24, %esp @@ -241,14 +240,11 @@ define void @f1() { ; ; 686-LABEL: f1: ; 686: # %bb.0: # %entry -; 686-NEXT: pushl %edi -; 686-NEXT: .cfi_def_cfa_offset 8 ; 686-NEXT: pushl %esi -; 686-NEXT: .cfi_def_cfa_offset 12 +; 686-NEXT: .cfi_def_cfa_offset 8 ; 686-NEXT: subl $1, %esp -; 686-NEXT: .cfi_def_cfa_offset 13 -; 686-NEXT: .cfi_offset %esi, -12 -; 686-NEXT: .cfi_offset %edi, -8 +; 686-NEXT: .cfi_def_cfa_offset 9 +; 686-NEXT: .cfi_offset %esi, -8 ; 686-NEXT: movl var_5, %edx ; 686-NEXT: movl %edx, %eax ; 686-NEXT: xorl $208307499, %eax # imm = 0xC6A852B @@ -266,11 +262,10 @@ define void @f1() { ; 686-NEXT: xorl %ecx, %ecx ; 686-NEXT: cmpl $-1, %edx ; 686-NEXT: sete %cl -; 686-NEXT: xorl %edi, %edi ; 686-NEXT: addl $7093, %edx # imm = 0x1BB5 -; 686-NEXT: adcxl %esi, %edi +; 686-NEXT: adcl $0, %esi ; 686-NEXT: cmpl %ecx, %edx -; 686-NEXT: sbbl $0, %edi +; 686-NEXT: sbbl $0, %esi ; 686-NEXT: setl %cl ; 686-NEXT: movzbl %cl, %ecx ; 686-NEXT: movl %ecx, var_57 @@ -278,10 +273,8 @@ define void @f1() { ; 686-NEXT: movl %eax, _ZN8struct_210member_2_0E ; 686-NEXT: movl $0, _ZN8struct_210member_2_0E+4 ; 686-NEXT: addl $1, %esp -; 686-NEXT: .cfi_def_cfa_offset 12 -; 686-NEXT: popl %esi ; 686-NEXT: .cfi_def_cfa_offset 8 -; 686-NEXT: popl %edi +; 686-NEXT: popl %esi ; 686-NEXT: .cfi_def_cfa_offset 4 ; 686-NEXT: retl entry: diff --git a/llvm/test/CodeGen/X86/stack-folding-adx-x86_64.ll b/llvm/test/CodeGen/X86/stack-folding-adx-x86_64.ll index 77ea70d1928..22d9c39125c 100644 --- a/llvm/test/CodeGen/X86/stack-folding-adx-x86_64.ll +++ b/llvm/test/CodeGen/X86/stack-folding-adx-x86_64.ll @@ -1,4 +1,5 @@ -; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+adx < %s | FileCheck %s +; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+adx < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ADX +; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=-adx < %s | FileCheck %s --check-prefix=CHECK --check-prefix=NOADX target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-unknown" @@ -10,7 +11,7 @@ target triple = "x86_64-unknown-unknown" define i8 @stack_fold_addcarry_u32(i8 %a0, i32 %a1, i32 %a2, i8* %a3) { ;CHECK-LABEL: stack_fold_addcarry_u32 - ;CHECK: adcxl {{-?[0-9]*}}(%rsp), %{{.*}} {{.*#+}} 4-byte Folded Reload + ;CHECK: adcl {{-?[0-9]*}}(%rsp), %{{.*}} {{.*#+}} 4-byte Folded Reload %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() %2 = tail call i8 @llvm.x86.addcarry.u32(i8 %a0, i32 %a1, i32 %a2, i8* %a3) ret i8 %2; @@ -19,7 +20,7 @@ declare i8 @llvm.x86.addcarry.u32(i8, i32, i32, i8*) define i8 @stack_fold_addcarry_u64(i8 %a0, i64 %a1, i64 %a2, i8* %a3) { ;CHECK-LABEL: stack_fold_addcarry_u64 - ;CHECK: adcxq {{-?[0-9]*}}(%rsp), %{{.*}} {{.*#+}} 8-byte Folded Reload + ;CHECK: adcq {{-?[0-9]*}}(%rsp), %{{.*}} {{.*#+}} 8-byte Folded Reload %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() %2 = tail call i8 @llvm.x86.addcarry.u64(i8 %a0, i64 %a1, i64 %a2, i8* %a3) ret i8 %2; @@ -28,7 +29,7 @@ declare i8 @llvm.x86.addcarry.u64(i8, i64, i64, i8*) define i8 @stack_fold_addcarryx_u32(i8 %a0, i32 %a1, i32 %a2, i8* %a3) { ;CHECK-LABEL: stack_fold_addcarryx_u32 - ;CHECK: adcxl {{-?[0-9]*}}(%rsp), %{{.*}} {{.*#+}} 4-byte Folded Reload + ;CHECK: adcl {{-?[0-9]*}}(%rsp), %{{.*}} {{.*#+}} 4-byte Folded Reload %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() %2 = tail call i8 @llvm.x86.addcarryx.u32(i8 %a0, i32 %a1, i32 %a2, i8* %a3) ret i8 %2; @@ -37,7 +38,7 @@ declare i8 @llvm.x86.addcarryx.u32(i8, i32, i32, i8*) define i8 @stack_fold_addcarryx_u64(i8 %a0, i64 %a1, i64 %a2, i8* %a3) { ;CHECK-LABEL: stack_fold_addcarryx_u64 - ;CHECK: adcxq {{-?[0-9]*}}(%rsp), %{{.*}} {{.*#+}} 8-byte Folded Reload + ;CHECK: adcq {{-?[0-9]*}}(%rsp), %{{.*}} {{.*#+}} 8-byte Folded Reload %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"() %2 = tail call i8 @llvm.x86.addcarryx.u64(i8 %a0, i64 %a1, i64 %a2, i8* %a3) ret i8 %2; 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