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| author | Nikolay Haustov <Nikolay.Haustov@amd.com> | 2016-05-06 09:07:29 +0000 |
|---|---|---|
| committer | Nikolay Haustov <Nikolay.Haustov@amd.com> | 2016-05-06 09:07:29 +0000 |
| commit | 1f7732abfab990d56f3aa7ad4180a292fbf9d4fc (patch) | |
| tree | e2e50e39e9b39c7f7f4b66b8a5c5423fcfc7848d /llvm/test | |
| parent | a609e37ebd9911eed50235e52f241c4407678d69 (diff) | |
| download | bcm5719-llvm-1f7732abfab990d56f3aa7ad4180a292fbf9d4fc.tar.gz bcm5719-llvm-1f7732abfab990d56f3aa7ad4180a292fbf9d4fc.zip | |
AMDGPU/SI: Add amdgpu_kernel calling convention. Part 1.
Summary:
This will be used for AMDGPU_HSA_KERNEL symbol type in output ELF.
Also, in the future unused non-kernels may be optimized.
For now, also accept SPIR_KERNEL for HCC frontend.
Also, add bitcode compatibility tests for missing calling conventions
except AVR_BUILTIN which doesn't have parse code.
Reviewers: tstellarAMD, arsenm
Subscribers: arsenm, joker.eph, llvm-commits
llvm-svn: 268717
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/Bitcode/compatibility.ll | 40 | ||||
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/hsa.ll | 2 |
2 files changed, 41 insertions, 1 deletions
diff --git a/llvm/test/Bitcode/compatibility.ll b/llvm/test/Bitcode/compatibility.ll index d1f249114d5..4f0f29cfc87 100644 --- a/llvm/test/Bitcode/compatibility.ll +++ b/llvm/test/Bitcode/compatibility.ll @@ -428,6 +428,46 @@ declare cc80 void @f.cc80() ; CHECK: declare x86_vectorcallcc void @f.cc80() declare x86_vectorcallcc void @f.x86_vectorcallcc() ; CHECK: declare x86_vectorcallcc void @f.x86_vectorcallcc() +declare cc81 void @f.cc81() +; CHECK: declare hhvmcc void @f.cc81() +declare hhvmcc void @f.hhvmcc() +; CHECK: declare hhvmcc void @f.hhvmcc() +declare cc82 void @f.cc82() +; CHECK: declare hhvm_ccc void @f.cc82() +declare hhvm_ccc void @f.hhvm_ccc() +; CHECK: declare hhvm_ccc void @f.hhvm_ccc() +declare cc83 void @f.cc83() +; CHECK: declare x86_intrcc void @f.cc83() +declare x86_intrcc void @f.x86_intrcc() +; CHECK: declare x86_intrcc void @f.x86_intrcc() +declare cc84 void @f.cc84() +; CHECK: declare avr_intrcc void @f.cc84() +declare avr_intrcc void @f.avr_intrcc() +; CHECK: declare avr_intrcc void @f.avr_intrcc() +declare cc85 void @f.cc85() +; CHECK: declare avr_signalcc void @f.cc85() +declare avr_signalcc void @f.avr_signalcc() +; CHECK: declare avr_signalcc void @f.avr_signalcc() +declare cc87 void @f.cc87() +; CHECK: declare amdgpu_vs void @f.cc87() +declare amdgpu_vs void @f.amdgpu_vs() +; CHECK: declare amdgpu_vs void @f.amdgpu_vs() +declare cc88 void @f.cc88() +; CHECK: declare amdgpu_gs void @f.cc88() +declare amdgpu_gs void @f.amdgpu_gs() +; CHECK: declare amdgpu_gs void @f.amdgpu_gs() +declare cc89 void @f.cc89() +; CHECK: declare amdgpu_ps void @f.cc89() +declare amdgpu_ps void @f.amdgpu_ps() +; CHECK: declare amdgpu_ps void @f.amdgpu_ps() +declare cc90 void @f.cc90() +; CHECK: declare amdgpu_cs void @f.cc90() +declare amdgpu_cs void @f.amdgpu_cs() +; CHECK: declare amdgpu_cs void @f.amdgpu_cs() +declare cc91 void @f.cc91() +; CHECK: declare amdgpu_kernel void @f.cc91() +declare amdgpu_kernel void @f.amdgpu_kernel() +; CHECK: declare amdgpu_kernel void @f.amdgpu_kernel() declare cc1023 void @f.cc1023() ; CHECK: declare cc1023 void @f.cc1023() diff --git a/llvm/test/CodeGen/AMDGPU/hsa.ll b/llvm/test/CodeGen/AMDGPU/hsa.ll index 9017b6253d2..1f07242d29a 100644 --- a/llvm/test/CodeGen/AMDGPU/hsa.ll +++ b/llvm/test/CodeGen/AMDGPU/hsa.ll @@ -53,7 +53,7 @@ ; HSA: .Lfunc_end0: ; HSA: .size simple, .Lfunc_end0-simple -define void @simple(i32 addrspace(1)* %out) { +define amdgpu_kernel void @simple(i32 addrspace(1)* %out) { entry: store i32 0, i32 addrspace(1)* %out ret void |
