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| author | Andrey Turetskiy <andrey.turetskiy@gmail.com> | 2016-01-13 11:30:44 +0000 |
|---|---|---|
| committer | Andrey Turetskiy <andrey.turetskiy@gmail.com> | 2016-01-13 11:30:44 +0000 |
| commit | 1ce2c9973fa78e53be887f0a53f6939d2d1f3bf9 (patch) | |
| tree | 7657ca36019d95ba82e2ac9a44c9d3a877a6b68d /llvm/test | |
| parent | 253dbf540540ed0019ea0d6d2e9b38411688a47c (diff) | |
| download | bcm5719-llvm-1ce2c9973fa78e53be887f0a53f6939d2d1f3bf9.tar.gz bcm5719-llvm-1ce2c9973fa78e53be887f0a53f6939d2d1f3bf9.zip | |
LEA code size optimization pass (Part 2): Remove redundant LEA instructions.
Make x86 OptimizeLEAs pass remove LEA instruction if there is another LEA
(in the same basic block) which calculates address differing only be a
displacement. Works only for -Oz.
Differential Revision: http://reviews.llvm.org/D13295
llvm-svn: 257589
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/lea-opt.ll | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/lea-opt.ll b/llvm/test/CodeGen/X86/lea-opt.ll index 571f2d9084c..8096bfabd6c 100644 --- a/llvm/test/CodeGen/X86/lea-opt.ll +++ b/llvm/test/CodeGen/X86/lea-opt.ll @@ -129,3 +129,41 @@ sw.epilog: ; preds = %sw.bb.2, %sw.bb.1, ; CHECK: movl ${{[1-4]+}}, ([[REG2]]) ; CHECK: movl ${{[1-4]+}}, ([[REG3]]) } + +define void @test4(i64 %x) nounwind minsize { +entry: + %a = getelementptr inbounds [65 x %struct.anon1], [65 x %struct.anon1]* @arr1, i64 0, i64 %x, i32 0 + %tmp = load i32, i32* %a, align 4 + %b = getelementptr inbounds [65 x %struct.anon1], [65 x %struct.anon1]* @arr1, i64 0, i64 %x, i32 1 + %tmp1 = load i32, i32* %b, align 4 + %sub = sub i32 %tmp, %tmp1 + %c = getelementptr inbounds [65 x %struct.anon1], [65 x %struct.anon1]* @arr1, i64 0, i64 %x, i32 2 + %tmp2 = load i32, i32* %c, align 4 + %add = add nsw i32 %sub, %tmp2 + switch i32 %add, label %sw.epilog [ + i32 1, label %sw.bb.1 + i32 2, label %sw.bb.2 + ] + +sw.bb.1: ; preds = %entry + store i32 111, i32* %b, align 4 + store i32 222, i32* %c, align 4 + br label %sw.epilog + +sw.bb.2: ; preds = %entry + store i32 333, i32* %b, align 4 + store i32 444, i32* %c, align 4 + br label %sw.epilog + +sw.epilog: ; preds = %sw.bb.2, %sw.bb.1, %entry + ret void +; CHECK-LABEL: test4: +; CHECK: leaq arr1+4({{.*}}), [[REG2:%[a-z]+]] +; CHECK: movl -4([[REG2]]), {{.*}} +; CHECK: subl ([[REG2]]), {{.*}} +; CHECK: addl 4([[REG2]]), {{.*}} +; CHECK: movl ${{[1-4]+}}, ([[REG2]]) +; CHECK: movl ${{[1-4]+}}, 4([[REG2]]) +; CHECK: movl ${{[1-4]+}}, ([[REG2]]) +; CHECK: movl ${{[1-4]+}}, 4([[REG2]]) +} |
