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| author | Craig Topper <craig.topper@intel.com> | 2018-04-29 06:24:09 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-04-29 06:24:09 +0000 |
| commit | 18c4c8efafcbd7b15bdf70c1b67d2f22b4f5c034 (patch) | |
| tree | 1e6ca84d27fc7fb02d9045aaad0c1ba3cdc2bcc1 /llvm/test | |
| parent | d186829093e8c9b2d96cb5b10c81a6e78519e33b (diff) | |
| download | bcm5719-llvm-18c4c8efafcbd7b15bdf70c1b67d2f22b4f5c034.tar.gz bcm5719-llvm-18c4c8efafcbd7b15bdf70c1b67d2f22b4f5c034.zip | |
[X86] Add suffixes to the LGDT/LIDT/SGDT/SIDT mnemonics in Intel syntax. Add aliases based on 16/32-bit mode to choose the default.
This allows the instruction selection to follow mode in Intel syntax. And allows a suffix to be used to change size.
This matches gas behavior from what I could tell.
llvm-svn: 331138
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/Disassembler/X86/intel-syntax-32.txt | 8 | ||||
| -rw-r--r-- | llvm/test/MC/X86/intel-syntax-ptr-sized.s | 18 |
2 files changed, 22 insertions, 4 deletions
diff --git a/llvm/test/MC/Disassembler/X86/intel-syntax-32.txt b/llvm/test/MC/Disassembler/X86/intel-syntax-32.txt index 66c87b8bc07..b47c8dbf0b6 100644 --- a/llvm/test/MC/Disassembler/X86/intel-syntax-32.txt +++ b/llvm/test/MC/Disassembler/X86/intel-syntax-32.txt @@ -1,15 +1,15 @@ # RUN: llvm-mc --disassemble %s -triple=i386 --output-asm-variant=1 | FileCheck %s -# CHECK: sgdt opaque ptr [eax] +# CHECK: sgdtd opaque ptr [eax] 0x0f 0x01 0x00 -# CHECK: sidt opaque ptr [eax] +# CHECK: sidtd opaque ptr [eax] 0x0f 0x01 0x08 -# CHECK: lgdt opaque ptr [eax] +# CHECK: lgdtd opaque ptr [eax] 0x0f 0x01 0x10 -# CHECK: lidt opaque ptr [eax] +# CHECK: lidtd opaque ptr [eax] 0x0f 0x01 0x18 # CHECK: mov al, byte ptr [878082192] diff --git a/llvm/test/MC/X86/intel-syntax-ptr-sized.s b/llvm/test/MC/X86/intel-syntax-ptr-sized.s index c052c322b80..a360557eaa6 100644 --- a/llvm/test/MC/X86/intel-syntax-ptr-sized.s +++ b/llvm/test/MC/X86/intel-syntax-ptr-sized.s @@ -9,6 +9,15 @@ call [eax] jmp [eax] // CHECK: jmpl *(%eax) +lgdt [eax] +// CHECK: lgdtl (%eax) +lidt [eax] +// CHECK: lidtl (%eax) +sgdt [eax] +// CHECK: sgdtl (%eax) +sidt [eax] +// CHECK: sidtl (%eax) + // mode switch .code16 @@ -18,3 +27,12 @@ call [eax] // CHECK: callw *(%eax) jmp [eax] // CHECK: jmpw *(%eax) + +lgdt [eax] +// CHECK: lgdtw (%eax) +lidt [eax] +// CHECK: lidtw (%eax) +sgdt [eax] +// CHECK: sgdtw (%eax) +sidt [eax] +// CHECK: sidtw (%eax) |
