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| author | David L Kreitzer <david.l.kreitzer@intel.com> | 2016-03-10 15:14:02 +0000 |
|---|---|---|
| committer | David L Kreitzer <david.l.kreitzer@intel.com> | 2016-03-10 15:14:02 +0000 |
| commit | 14f0077f38a9714e56824c2c9da1f37b9293d42e (patch) | |
| tree | 6e75c74d921e01402330d4af8164d854d0d3812d /llvm/test | |
| parent | f8fc7e124ed1775b28f80c3a4b02760e8d064552 (diff) | |
| download | bcm5719-llvm-14f0077f38a9714e56824c2c9da1f37b9293d42e.tar.gz bcm5719-llvm-14f0077f38a9714e56824c2c9da1f37b9293d42e.zip | |
Unified the handling of returns in the X87 stackifier so that the stackifier
runs successfully on routines containing IRETs. This fixes PR26410.
Differential Revision: http://reviews.llvm.org/D17643
llvm-svn: 263120
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/x86-32-intrcc.ll | 18 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/x86-64-intrcc.ll | 21 |
2 files changed, 36 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/X86/x86-32-intrcc.ll b/llvm/test/CodeGen/X86/x86-32-intrcc.ll index 99d0044c6de..9794f2cb3e4 100644 --- a/llvm/test/CodeGen/X86/x86-32-intrcc.ll +++ b/llvm/test/CodeGen/X86/x86-32-intrcc.ll @@ -3,7 +3,7 @@ %struct.interrupt_frame = type { i32, i32, i32, i32, i32 } -@llvm.used = appending global [3 x i8*] [i8* bitcast (void (%struct.interrupt_frame*)* @test_isr_no_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i32)* @test_isr_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i32)* @test_isr_clobbers to i8*)], section "llvm.metadata" +@llvm.used = appending global [4 x i8*] [i8* bitcast (void (%struct.interrupt_frame*)* @test_isr_no_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i32)* @test_isr_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i32)* @test_isr_clobbers to i8*), i8* bitcast (void (%struct.interrupt_frame*)* @test_isr_x87 to i8*)], section "llvm.metadata" ; Spills eax, putting original esp at +4. ; No stack adjustment if declared with no error code @@ -77,3 +77,19 @@ define x86_intrcc void @test_isr_clobbers(%struct.interrupt_frame* %frame, i32 % ret void } +@f80 = common global x86_fp80 0xK00000000000000000000, align 4 + +; Test that the presence of x87 does not crash the FP stackifier +define x86_intrcc void @test_isr_x87(%struct.interrupt_frame* %frame) { + ; CHECK-LABEL: test_isr_x87 + ; CHECK-DAG: fldt f80 + ; CHECK-DAG: fld1 + ; CHECK: faddp + ; CHECK-NEXT: fstpt f80 + ; CHECK-NEXT: iretl +entry: + %ld = load x86_fp80, x86_fp80* @f80, align 4 + %add = fadd x86_fp80 %ld, 0xK3FFF8000000000000000 + store x86_fp80 %add, x86_fp80* @f80, align 4 + ret void +} diff --git a/llvm/test/CodeGen/X86/x86-64-intrcc.ll b/llvm/test/CodeGen/X86/x86-64-intrcc.ll index 429209c063c..2bcf3cde478 100644 --- a/llvm/test/CodeGen/X86/x86-64-intrcc.ll +++ b/llvm/test/CodeGen/X86/x86-64-intrcc.ll @@ -3,7 +3,7 @@ %struct.interrupt_frame = type { i64, i64, i64, i64, i64 } -@llvm.used = appending global [3 x i8*] [i8* bitcast (void (%struct.interrupt_frame*)* @test_isr_no_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i64)* @test_isr_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i64)* @test_isr_clobbers to i8*)], section "llvm.metadata" +@llvm.used = appending global [4 x i8*] [i8* bitcast (void (%struct.interrupt_frame*)* @test_isr_no_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i64)* @test_isr_ecode to i8*), i8* bitcast (void (%struct.interrupt_frame*, i64)* @test_isr_clobbers to i8*), i8* bitcast (void (%struct.interrupt_frame*)* @test_isr_x87 to i8*)], section "llvm.metadata" ; Spills rax, putting original esp at +8. ; No stack adjustment if declared with no error code @@ -83,4 +83,21 @@ define x86_intrcc void @test_isr_clobbers(%struct.interrupt_frame* %frame, i64 % ; CHECK0-SSE-NEXT: addq $8, %rsp ; CHECK0-SSE-NEXT: iretq ret void -}
\ No newline at end of file +} + +@f80 = common global x86_fp80 0xK00000000000000000000, align 4 + +; Test that the presence of x87 does not crash the FP stackifier +define x86_intrcc void @test_isr_x87(%struct.interrupt_frame* %frame) { + ; CHECK-LABEL: test_isr_x87 + ; CHECK-DAG: fldt f80 + ; CHECK-DAG: fld1 + ; CHECK: faddp + ; CHECK-NEXT: fstpt f80 + ; CHECK-NEXT: iretq +entry: + %ld = load x86_fp80, x86_fp80* @f80, align 4 + %add = fadd x86_fp80 %ld, 0xK3FFF8000000000000000 + store x86_fp80 %add, x86_fp80* @f80, align 4 + ret void +} |

