summaryrefslogtreecommitdiffstats
path: root/llvm/test
diff options
context:
space:
mode:
authorAsiri Rathnayake <asiri.rathnayake@arm.com>2014-12-04 19:34:59 +0000
committerAsiri Rathnayake <asiri.rathnayake@arm.com>2014-12-04 19:34:59 +0000
commit13cef35cbae9824b7a96a717121c9e775863f168 (patch)
treedc8b59f2ef2714a9b065e6e711ae6830cd252f22 /llvm/test
parent300d8ffdf2b07c77a6ffb30fe9b347f430d09df5 (diff)
downloadbcm5719-llvm-13cef35cbae9824b7a96a717121c9e775863f168.tar.gz
bcm5719-llvm-13cef35cbae9824b7a96a717121c9e775863f168.zip
Fix yet another unseen regression caused by r223113
r223113 added support for ARM modified immediate assembly syntax. Which assumes all immediate operands are prefixed with a '#'. This assumption is wrong as per the ARMARM - which recommends that all '#' characters be treated optional. The current patch fixes this regression and adds a test case. A follow-up patch will expand the test coverage to other instructions. llvm-svn: 223381
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/ARM/basic-arm-instructions.s6
-rw-r--r--llvm/test/MC/ARM/ldr-pseudo-parse-errors.s2
2 files changed, 7 insertions, 1 deletions
diff --git a/llvm/test/MC/ARM/basic-arm-instructions.s b/llvm/test/MC/ARM/basic-arm-instructions.s
index 878948ae7b4..b15701f1c83 100644
--- a/llvm/test/MC/ARM/basic-arm-instructions.s
+++ b/llvm/test/MC/ARM/basic-arm-instructions.s
@@ -16,6 +16,9 @@ _func:
@ ADC (immediate)
@------------------------------------------------------------------------------
adc r1, r2, #0xf
+ adc r1, r2, $0xf
+ adc r1, r2, 0xf
+ adc r1, r2, 15
adc r7, r8, #42, #2
adc r7, r8, #-2147483638
adc r7, r8, #40, #2
@@ -34,6 +37,9 @@ _func:
adceq r1, r2, #0xf00
@ CHECK: adc r1, r2, #15 @ encoding: [0x0f,0x10,0xa2,0xe2]
+@ CHECK: adc r1, r2, #15 @ encoding: [0x0f,0x10,0xa2,0xe2]
+@ CHECK: adc r1, r2, #15 @ encoding: [0x0f,0x10,0xa2,0xe2]
+@ CHECK: adc r1, r2, #15 @ encoding: [0x0f,0x10,0xa2,0xe2]
@ CHECK: adc r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0xa8,0xe2]
@ CHECK: adc r7, r8, #-2147483638 @ encoding: [0x2a,0x71,0xa8,0xe2]
@ CHECK: adc r7, r8, #40, #2 @ encoding: [0x28,0x71,0xa8,0xe2]
diff --git a/llvm/test/MC/ARM/ldr-pseudo-parse-errors.s b/llvm/test/MC/ARM/ldr-pseudo-parse-errors.s
index 2e6114d6fe0..2516239f5ee 100644
--- a/llvm/test/MC/ARM/ldr-pseudo-parse-errors.s
+++ b/llvm/test/MC/ARM/ldr-pseudo-parse-errors.s
@@ -4,7 +4,7 @@
.text
bar:
mov r0, =0x101
-@ CHECK: error: unexpected token in operand
+@ CHECK: error: unknown token in expression
@ CHECK: mov r0, =0x101
@ CHECK: ^
OpenPOWER on IntegriCloud