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| author | Reed Kotler <rkotler@mips.com> | 2014-10-10 17:00:46 +0000 |
|---|---|---|
| committer | Reed Kotler <rkotler@mips.com> | 2014-10-10 17:00:46 +0000 |
| commit | 12f9488e3375e5254226befb423b888b65410ee0 (patch) | |
| tree | a2352097c75361683847d854f270c37a33d45472 /llvm/test | |
| parent | 7d6f29d1eed3bcbd716ac7502a71ee4792c2538d (diff) | |
| download | bcm5719-llvm-12f9488e3375e5254226befb423b888b65410ee0.tar.gz bcm5719-llvm-12f9488e3375e5254226befb423b888b65410ee0.zip | |
Implement floating point to integer conversion in mips fast-isel
Summary: Add the ability to convert 64 or 32 bit floating point values to integer in mips fast-isel
Test Plan:
fpintconv.ll
ran 4 flavors of test-suite with no errors, misp32 r1/r2 O0/O2
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits, rfuhler, mcrosier
Differential Revision: http://reviews.llvm.org/D5562
llvm-svn: 219511
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/Mips/Fast-ISel/fpintconv.ll | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Mips/Fast-ISel/fpintconv.ll b/llvm/test/CodeGen/Mips/Fast-ISel/fpintconv.ll new file mode 100644 index 00000000000..846726a868b --- /dev/null +++ b/llvm/test/CodeGen/Mips/Fast-ISel/fpintconv.ll @@ -0,0 +1,35 @@ +; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32r2 \ +; RUN: < %s | FileCheck %s +; RUN: llc -march=mipsel -relocation-model=pic -O0 -mips-fast-isel -fast-isel-abort -mcpu=mips32 \ +; RUN: < %s | FileCheck %s + + +@f = global float 0x40D6E83280000000, align 4 +@d = global double 0x4132D68780000000, align 8 +@i_f = common global i32 0, align 4 +@i_d = common global i32 0, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +; Function Attrs: nounwind +define void @ifv() { +entry: +; CHECK-LABEL: .ent ifv + %0 = load float* @f, align 4 + %conv = fptosi float %0 to i32 +; CHECK: trunc.w.s $f[[REG:[0-9]+]], $f{{[0-9]+}} +; CHECK: mfc1 ${{[0-9]+}}, $f[[REG]] + store i32 %conv, i32* @i_f, align 4 + ret void +} + +; Function Attrs: nounwind +define void @idv() { +entry: +; CHECK-LABEL: .ent idv + %0 = load double* @d, align 8 + %conv = fptosi double %0 to i32 +; CHECK: trunc.w.d $f[[REG:[0-9]+]], $f{{[0-9]+}} +; CHECK: mfc1 ${{[0-9]+}}, $f[[REG]] + store i32 %conv, i32* @i_d, align 4 + ret void +} |
