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| author | Joerg Sonnenberger <joerg@bec.de> | 2017-08-28 20:20:47 +0000 |
|---|---|---|
| committer | Joerg Sonnenberger <joerg@bec.de> | 2017-08-28 20:20:47 +0000 |
| commit | 0f76a35c5e3c2585179e7787f046519ce241129d (patch) | |
| tree | e8faed7d7869a610bf019e83d3b4e26976e9b6cb /llvm/test | |
| parent | ee8ad1c0ff7a09af01554c3e98fb2af1ee3e5f17 (diff) | |
| download | bcm5719-llvm-0f76a35c5e3c2585179e7787f046519ce241129d.tar.gz bcm5719-llvm-0f76a35c5e3c2585179e7787f046519ce241129d.zip | |
Fix ARMv4 support
ARMv4 doesn't support the "BX" instruction, which has been introduced
with ARMv4t. Adjust the call lowering and tail call implementation
accordingly.
Further changes are necessary to ensure that presence of the v4t feature
is correctly set. Most importantly, the "generic" CPU for thumb-*
triples should include ARMv4t, since thumb mode without thumb support
would naturally be pointless.
Add a couple of asserts to ensure thumb instructions are not emitted
without CPU support.
Differential Revision: https://reviews.llvm.org/D37030
llvm-svn: 311921
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/armv4.ll | 17 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/debug-segmented-stacks.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/segmented-stacks-dynamic.ll | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM/segmented-stacks.ll | 4 |
5 files changed, 26 insertions, 11 deletions
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll b/llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll index f50916e4b47..82e9b20731e 100644 --- a/llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll +++ b/llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple arm-unknown -mattr=+vfp2 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LITTLE -; RUN: llc -mtriple armeb-unknown -mattr=+vfp2 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=BIG +; RUN: llc -mtriple arm-unknown -mattr=+vfp2,+v4t -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LITTLE +; RUN: llc -mtriple armeb-unknown -mattr=+vfp2,+v4t -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=BIG define void @test_void_return() { ; CHECK-LABEL: name: test_void_return diff --git a/llvm/test/CodeGen/ARM/armv4.ll b/llvm/test/CodeGen/ARM/armv4.ll index 6b213d564bd..a0379caaa4f 100644 --- a/llvm/test/CodeGen/ARM/armv4.ll +++ b/llvm/test/CodeGen/ARM/armv4.ll @@ -5,9 +5,24 @@ ; RUN: llc < %s -mtriple=armv4-unknown-eabi | FileCheck %s -check-prefix=ARM ; RUN: llc < %s -mtriple=armv4t-unknown-eabi | FileCheck %s -check-prefix=THUMB -define i32 @test(i32 %a) nounwind readnone { +define i32 @test_return(i32 %a) nounwind readnone { entry: +; ARM-LABEL: test_return ; ARM: mov pc +; THUMB-LABEL: test_return ; THUMB: bx ret i32 %a } + +@helper = global i32 ()* null, align 4 + +define i32 @test_indirect() #0 { +entry: +; ARM-LABEL: test_indirect +; ARM: mov pc +; THUMB-LABEL: test_indirect +; THUMB: bx + %0 = load i32 ()*, i32 ()** @helper, align 4 + %call = tail call i32 %0() + ret i32 %call +} diff --git a/llvm/test/CodeGen/ARM/debug-segmented-stacks.ll b/llvm/test/CodeGen/ARM/debug-segmented-stacks.ll index 3aa33f75411..6dafcecf0f0 100644 --- a/llvm/test/CodeGen/ARM/debug-segmented-stacks.ll +++ b/llvm/test/CodeGen/ARM/debug-segmented-stacks.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=arm-linux-unknown-gnueabi -verify-machineinstrs -filetype=asm | FileCheck %s -check-prefix=ARM-linux -; RUN: llc < %s -mtriple=arm-linux-unknown-gnueabi -filetype=obj +; RUN: llc < %s -mtriple=arm-linux-unknown-gnueabi -mattr=+v4t -verify-machineinstrs -filetype=asm | FileCheck %s -check-prefix=ARM-linux +; RUN: llc < %s -mtriple=arm-linux-unknown-gnueabi -mattr=+v4t -filetype=obj !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!9, !10} diff --git a/llvm/test/CodeGen/ARM/segmented-stacks-dynamic.ll b/llvm/test/CodeGen/ARM/segmented-stacks-dynamic.ll index 86f8ff8dd90..65d25cad386 100644 --- a/llvm/test/CodeGen/ARM/segmented-stacks-dynamic.ll +++ b/llvm/test/CodeGen/ARM/segmented-stacks-dynamic.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -mtriple=arm-linux-androideabi -verify-machineinstrs | FileCheck %s -check-prefix=ARM-android -; RUN: llc < %s -mtriple=arm-linux-unknown-gnueabi -verify-machineinstrs | FileCheck %s -check-prefix=ARM-linux -; RUN: llc < %s -mtriple=arm-linux-androideabi -filetype=obj -; RUN: llc < %s -mtriple=arm-linux-unknown-gnueabi -filetype=obj +; RUN: llc < %s -mtriple=arm-linux-androideabi -mattr=+v4t -verify-machineinstrs | FileCheck %s -check-prefix=ARM-android +; RUN: llc < %s -mtriple=arm-linux-unknown-gnueabi -mattr=+v4t -verify-machineinstrs | FileCheck %s -check-prefix=ARM-linux +; RUN: llc < %s -mtriple=arm-linux-androideabi -mattr=+v4t -filetype=obj +; RUN: llc < %s -mtriple=arm-linux-unknown-gnueabi -mattr=+v4t -filetype=obj ; Just to prevent the alloca from being optimized away declare void @dummy_use(i32*, i32) diff --git a/llvm/test/CodeGen/ARM/segmented-stacks.ll b/llvm/test/CodeGen/ARM/segmented-stacks.ll index cbb124de11c..4fe84faa17f 100644 --- a/llvm/test/CodeGen/ARM/segmented-stacks.ll +++ b/llvm/test/CodeGen/ARM/segmented-stacks.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=arm-linux-androideabi -verify-machineinstrs | FileCheck %s -check-prefix=ARM-android -; RUN: llc < %s -mtriple=arm-linux-unknown-gnueabi -verify-machineinstrs | FileCheck %s -check-prefix=ARM-linux +; RUN: llc < %s -mtriple=arm-linux-androideabi -mattr=+v4t -verify-machineinstrs | FileCheck %s -check-prefix=ARM-android +; RUN: llc < %s -mtriple=arm-linux-unknown-gnueabi -mattr=+v4t -verify-machineinstrs | FileCheck %s -check-prefix=ARM-linux ; We used to crash with filetype=obj ; RUN: llc < %s -mtriple=arm-linux-androideabi -filetype=obj |

