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authorTim Northover <Tim.Northover@arm.com>2012-09-22 11:18:12 +0000
committerTim Northover <Tim.Northover@arm.com>2012-09-22 11:18:12 +0000
commit0c97e76492534528bb45ee7b7366bc59590718f7 (patch)
tree3a3144645d3d3fcf43fddb5f0fc23576d7aa1f66 /llvm/test
parent6cba23a6494e51044bc0f01b35bca7d65808a3fe (diff)
downloadbcm5719-llvm-0c97e76492534528bb45ee7b7366bc59590718f7.tar.gz
bcm5719-llvm-0c97e76492534528bb45ee7b7366bc59590718f7.zip
Fix the handling of edge cases in ARM shifted operands.
This patch fixes load/store instructions to handle less common cases like "asr #32", "rrx" properly throughout the MC layer. Patch by Chris Lidbury. llvm-svn: 164455
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/ARM/arm-shift-encoding.s76
-rw-r--r--llvm/test/MC/ARM/diagnostics.s40
2 files changed, 116 insertions, 0 deletions
diff --git a/llvm/test/MC/ARM/arm-shift-encoding.s b/llvm/test/MC/ARM/arm-shift-encoding.s
new file mode 100644
index 00000000000..c849380ff2b
--- /dev/null
+++ b/llvm/test/MC/ARM/arm-shift-encoding.s
@@ -0,0 +1,76 @@
+@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7 -show-encoding < %s | FileCheck %s
+
+ ldr r0, [r0, r0]
+ ldr r0, [r0, r0, lsr #32]
+ ldr r0, [r0, r0, lsr #16]
+ ldr r0, [r0, r0, lsl #0]
+ ldr r0, [r0, r0, lsl #16]
+ ldr r0, [r0, r0, asr #32]
+ ldr r0, [r0, r0, asr #16]
+ ldr r0, [r0, r0, rrx]
+ ldr r0, [r0, r0, ror #16]
+
+@ CHECK: ldr r0, [r0, r0] @ encoding: [0x00,0x00,0x90,0xe7]
+@ CHECK: ldr r0, [r0, r0, lsr #32] @ encoding: [0x20,0x00,0x90,0xe7]
+@ CHECK: ldr r0, [r0, r0, lsr #16] @ encoding: [0x20,0x08,0x90,0xe7]
+@ CHECK: ldr r0, [r0, r0] @ encoding: [0x00,0x00,0x90,0xe7]
+@ CHECK: ldr r0, [r0, r0, lsl #16] @ encoding: [0x00,0x08,0x90,0xe7]
+@ CHECK: ldr r0, [r0, r0, asr #32] @ encoding: [0x40,0x00,0x90,0xe7]
+@ CHECK: ldr r0, [r0, r0, asr #16] @ encoding: [0x40,0x08,0x90,0xe7]
+@ CHECK: ldr r0, [r0, r0, rrx] @ encoding: [0x60,0x00,0x90,0xe7]
+@ CHECK: ldr r0, [r0, r0, ror #16] @ encoding: [0x60,0x08,0x90,0xe7]
+
+ pld [r0, r0]
+ pld [r0, r0, lsr #32]
+ pld [r0, r0, lsr #16]
+ pld [r0, r0, lsl #0]
+ pld [r0, r0, lsl #16]
+ pld [r0, r0, asr #32]
+ pld [r0, r0, asr #16]
+ pld [r0, r0, rrx]
+ pld [r0, r0, ror #16]
+
+@ CHECK: [r0, r0] @ encoding: [0x00,0xf0,0xd0,0xf7]
+@ CHECK: [r0, r0, lsr #32] @ encoding: [0x20,0xf0,0xd0,0xf7]
+@ CHECK: [r0, r0, lsr #16] @ encoding: [0x20,0xf8,0xd0,0xf7]
+@ CHECK: [r0, r0] @ encoding: [0x00,0xf0,0xd0,0xf7]
+@ CHECK: [r0, r0, lsl #16] @ encoding: [0x00,0xf8,0xd0,0xf7]
+@ CHECK: [r0, r0, asr #32] @ encoding: [0x40,0xf0,0xd0,0xf7]
+@ CHECK: [r0, r0, asr #16] @ encoding: [0x40,0xf8,0xd0,0xf7]
+@ CHECK: [r0, r0, rrx] @ encoding: [0x60,0xf0,0xd0,0xf7]
+@ CHECK: [r0, r0, ror #16] @ encoding: [0x60,0xf8,0xd0,0xf7]
+
+ str r0, [r0, r0]
+ str r0, [r0, r0, lsr #32]
+ str r0, [r0, r0, lsr #16]
+ str r0, [r0, r0, lsl #0]
+ str r0, [r0, r0, lsl #16]
+ str r0, [r0, r0, asr #32]
+ str r0, [r0, r0, asr #16]
+ str r0, [r0, r0, rrx]
+ str r0, [r0, r0, ror #16]
+
+@ CHECK: str r0, [r0, r0] @ encoding: [0x00,0x00,0x80,0xe7]
+@ CHECK: str r0, [r0, r0, lsr #32] @ encoding: [0x20,0x00,0x80,0xe7]
+@ CHECK: str r0, [r0, r0, lsr #16] @ encoding: [0x20,0x08,0x80,0xe7]
+@ CHECK: str r0, [r0, r0] @ encoding: [0x00,0x00,0x80,0xe7]
+@ CHECK: str r0, [r0, r0, lsl #16] @ encoding: [0x00,0x08,0x80,0xe7]
+@ CHECK: str r0, [r0, r0, asr #32] @ encoding: [0x40,0x00,0x80,0xe7]
+@ CHECK: str r0, [r0, r0, asr #16] @ encoding: [0x40,0x08,0x80,0xe7]
+@ CHECK: str r0, [r0, r0, rrx] @ encoding: [0x60,0x00,0x80,0xe7]
+@ CHECK: str r0, [r0, r0, ror #16] @ encoding: [0x60,0x08,0x80,0xe7]
+
+@ Uses printAddrMode2OffsetOperand(), used by LDRBT_POST_IMM LDRBT_POST_REG
+@ LDRB_POST_IMM LDRB_POST_REG LDRT_POST_IMM LDRT_POST_REG LDR_POST_IMM
+@ LDR_POST_REG STRBT_POST_IMM STRBT_POST_REG STRB_POST_IMM STRB_POST_REG
+@ STRT_POST_IMM STRT_POST_REG STR_POST_IMM STR_POST_REG
+
+ ldr r0, [r1], r2, rrx
+ ldr r3, [r4], r5, ror #0
+ str r6, [r7], r8, lsl #0
+ str r9, [r10], r11
+
+@ CHECK: ldr r0, [r1], r2, rrx @ encoding: [0x62,0x00,0x91,0xe6]
+@ CHECK: ldr r3, [r4], r5 @ encoding: [0x05,0x30,0x94,0xe6]
+@ CHECK: str r6, [r7], r8 @ encoding: [0x08,0x60,0x87,0xe6]
+@ CHECK: str r9, [r10], r11 @ encoding: [0x0b,0x90,0x8a,0xe6]
diff --git a/llvm/test/MC/ARM/diagnostics.s b/llvm/test/MC/ARM/diagnostics.s
index 499e0550135..ad4d9ab9b5e 100644
--- a/llvm/test/MC/ARM/diagnostics.s
+++ b/llvm/test/MC/ARM/diagnostics.s
@@ -47,7 +47,47 @@
@ CHECK-ERRORS: error: immediate shift value out of range
@ CHECK-ERRORS: adc r4, r5, r6, ror #32
+ @ Out of range shift immediate values for load/store.
+ str r1, [r2, r3, lsl #invalid]
+ ldr r4, [r5], r6, lsl #-1
+ pld r4, [r5, r6, lsl #32]
+ str r4, [r5], r6, lsr #-1
+ ldr r4, [r5, r6, lsr #33]
+ pld r4, [r5, r6, asr #-1]
+ str r4, [r5, r6, asr #33]
+ ldr r4, [r5, r6, ror #-1]
+ pld r4, [r5, r6, ror #32]
+ pld r4, [r5, r6, rrx #0]
+@ CHECK-ERRORS: error: shift amount must be an immediate
+@ CHECK-ERRORS: str r1, [r2, r3, lsl #invalid]
+@ CHECK-ERRORS: ^
+@ CHECK-ERRORS: error: immediate shift value out of range
+@ CHECK-ERRORS: ldr r4, [r5], r6, lsl #-1
+@ CHECK-ERRORS: ^
+@ CHECK-ERRORS: error: immediate shift value out of range
+@ CHECK-ERRORS: pld r4, [r5, r6, lsl #32]
+@ CHECK-ERRORS: ^
+@ CHECK-ERRORS: error: immediate shift value out of range
+@ CHECK-ERRORS: str r4, [r5], r6, lsr #-1
+@ CHECK-ERRORS: ^
+@ CHECK-ERRORS: error: immediate shift value out of range
+@ CHECK-ERRORS: ldr r4, [r5, r6, lsr #33]
+@ CHECK-ERRORS: ^
+@ CHECK-ERRORS: error: immediate shift value out of range
+@ CHECK-ERRORS: pld r4, [r5, r6, asr #-1]
+@ CHECK-ERRORS: ^
+@ CHECK-ERRORS: error: immediate shift value out of range
+@ CHECK-ERRORS: str r4, [r5, r6, asr #33]
+@ CHECK-ERRORS: ^
+@ CHECK-ERRORS: error: immediate shift value out of range
+@ CHECK-ERRORS: ldr r4, [r5, r6, ror #-1]
+@ CHECK-ERRORS: ^
+@ CHECK-ERRORS: error: immediate shift value out of range
+@ CHECK-ERRORS: pld r4, [r5, r6, ror #32]
+@ CHECK-ERRORS: error: ']' expected
+@ CHECK-ERRORS: pld r4, [r5, r6, rrx #0]
+
@ Out of range 16-bit immediate on BKPT
bkpt #65536
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