Add support for part-word atomics for PPC

http://reviews.llvm.org/D8090#inline-67337

llvm-svn: 231843

3 files changed, 99 insertions, 9 deletions

diff --git a/llvm/test/CodeGen/PowerPC/atomic-2.ll b/llvm/test/CodeGen/PowerPC/atomic-2.ll
index bc77ed73f0e..9130921a0f1 100644
--- a/llvm/test/CodeGen/PowerPC/atomic-2.ll
+++ b/llvm/test/CodeGen/PowerPC/atomic-2.ll
@@ -1,4 +1,6 @@
 ; RUN: llc < %s -march=ppc64 | FileCheck %s
+; RUN: llc < %s -march=ppc64 -mcpu=pwr7 | FileCheck %s -check-prefix=CHECK-P7U
+; RUN: llc < %s -march=ppc64 -mcpu=pwr8 | FileCheck %s -check-prefix=CHECK-P7U
 
 define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind {
 ; CHECK-LABEL: exchange_and_add:
@@ -8,6 +10,22 @@ define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind {
   ret i64 %tmp
 }
 
+define i8 @exchange_and_add8(i8* %mem, i8 %val) nounwind {
+; CHECK-LABEL: exchange_and_add8:
+; CHECK-P7U: lbarx
+  %tmp = atomicrmw add i8* %mem, i8 %val monotonic
+; CHECK-P7U: stbcx.
+  ret i8 %tmp
+}
+
+define i16 @exchange_and_add16(i16* %mem, i16 %val) nounwind {
+; CHECK-LABEL: exchange_and_add16:
+; CHECK-P7U: lharx
+  %tmp = atomicrmw add i16* %mem, i16 %val monotonic
+; CHECK-P7U: sthcx.
+  ret i16 %tmp
+}
+
 define i64 @exchange_and_cmp(i64* %mem) nounwind {
 ; CHECK-LABEL: exchange_and_cmp:
 ; CHECK: ldarx
@@ -18,6 +36,26 @@ define i64 @exchange_and_cmp(i64* %mem) nounwind {
   ret i64 %tmp
 }
 
+define i8 @exchange_and_cmp8(i8* %mem) nounwind {
+; CHECK-LABEL: exchange_and_cmp8:
+; CHECK-P7U: lbarx
+  %tmppair = cmpxchg i8* %mem, i8 0, i8 1 monotonic monotonic
+  %tmp = extractvalue { i8, i1 } %tmppair, 0
+; CHECK-P7U: stbcx.
+; CHECK-P7U: stbcx.
+  ret i8 %tmp
+}
+
+define i16 @exchange_and_cmp16(i16* %mem) nounwind {
+; CHECK-LABEL: exchange_and_cmp16:
+; CHECK-P7U: lharx
+  %tmppair = cmpxchg i16* %mem, i16 0, i16 1 monotonic monotonic
+  %tmp = extractvalue { i16, i1 } %tmppair, 0
+; CHECK-P7U: sthcx.
+; CHECK-P7U: sthcx.
+  ret i16 %tmp
+}
+
 define i64 @exchange(i64* %mem, i64 %val) nounwind {
 ; CHECK-LABEL: exchange:
 ; CHECK: ldarx
@@ -26,6 +64,22 @@ define i64 @exchange(i64* %mem, i64 %val) nounwind {
   ret i64 %tmp
 }
 
+define i8 @exchange8(i8* %mem, i8 %val) nounwind {
+; CHECK-LABEL: exchange8:
+; CHECK-P7U: lbarx
+  %tmp = atomicrmw xchg i8* %mem, i8 1 monotonic
+; CHECK-P7U: stbcx.
+  ret i8 %tmp
+}
+
+define i16 @exchange16(i16* %mem, i16 %val) nounwind {
+; CHECK-LABEL: exchange16:
+; CHECK-P7U: lharx
+  %tmp = atomicrmw xchg i16* %mem, i16 1 monotonic
+; CHECK-P7U: sthcx.
+  ret i16 %tmp
+}
+
 define void @atomic_store(i64* %mem, i64 %val) nounwind {
 entry:
 ; CHECK: @atomic_store
diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
index 7a30b5cb2b6..9d63bdd6276 100644
--- a/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
+++ b/llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
@@ -42,12 +42,30 @@
 # CHECK: dcbf 2, 3                       
 0x7c 0x02 0x18 0xac
 
-# CHECK: lwarx 2, 3, 4                   
+# CHECK: lbarx 2, 3, 4
+0x7c 0x43 0x20 0x68
+
+# CHECK: lharx 2, 3, 4
+0x7c 0x43 0x20 0xe8
+
+# CHECK: lwarx 2, 3, 4
 0x7c 0x43 0x20 0x28
 
-# CHECK: ldarx 2, 3, 4                   
+# CHECK: ldarx 2, 3, 4
 0x7c 0x43 0x20 0xa8
 
+# CHECK: lbarx 2, 3, 4, 1
+0x7c 0x43 0x20 0x69
+
+# CHECK: lharx 2, 3, 4, 1
+0x7c 0x43 0x20 0xe9
+
+# CHECK: lwarx 2, 3, 4, 1
+0x7c 0x43 0x20 0x29
+
+# CHECK: ldarx 2, 3, 4, 1
+0x7c 0x43 0x20 0xa9
+
 # CHECK: sync 0                          
 0x7c 0x00 0x04 0xac
 
diff --git a/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s b/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s
index 20eba7083f6..a4e2d0e3b2d 100644
--- a/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s
+++ b/llvm/test/MC/PowerPC/ppc64-encoding-bookII.s
@@ -34,11 +34,6 @@
 # CHECK-LE: isync                           # encoding: [0x2c,0x01,0x00,0x4c]
             isync
 
-# FIXME:    lbarx 2, 3, 4, 1
-# FIXME:    lharx 2, 3, 4, 1
-# FIXME:    lwarx 2, 3, 4, 1
-# FIXME:    ldarx 2, 3, 4, 1
-
 # FIXME:    stbcx. 2, 3, 4
 # FIXME:    sthcx. 2, 3, 4
 # CHECK-BE: stwcx. 2, 3, 4                  # encoding: [0x7c,0x43,0x21,0x2d]
@@ -70,15 +65,38 @@
             dcbf 2, 3
 # FIXME:    dcbfl 2, 3
 
-# FIXME:    lbarx 2, 3, 4
-# FIXME:    lharx 2, 3, 4
+# CHECK-BE: lbarx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x68]
+# CHECK-LE: lbarx 2, 3, 4                   # encoding: [0x68,0x20,0x43,0x7c]
+            lbarx 2, 3, 4
+
+# CHECK-BE: lharx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0xe8]
+# CHECK-LE: lharx 2, 3, 4                   # encoding: [0xe8,0x20,0x43,0x7c]
+            lharx 2, 3, 4
+
 # CHECK-BE: lwarx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0x28]
 # CHECK-LE: lwarx 2, 3, 4                   # encoding: [0x28,0x20,0x43,0x7c]
             lwarx 2, 3, 4
+
 # CHECK-BE: ldarx 2, 3, 4                   # encoding: [0x7c,0x43,0x20,0xa8]
 # CHECK-LE: ldarx 2, 3, 4                   # encoding: [0xa8,0x20,0x43,0x7c]
             ldarx 2, 3, 4
 
+# CHECK-BE: lbarx 2, 3, 4, 1                # encoding: [0x7c,0x43,0x20,0x69]
+# CHECK-LE: lbarx 2, 3, 4, 1                # encoding: [0x69,0x20,0x43,0x7c]
+            lbarx 2, 3, 4, 1
+
+# CHECK-BE: lharx 2, 3, 4, 1                # encoding: [0x7c,0x43,0x20,0xe9]
+# CHECK-LE: lharx 2, 3, 4, 1                # encoding: [0xe9,0x20,0x43,0x7c]
+            lharx 2, 3, 4, 1
+
+# CHECK-BE: lwarx 2, 3, 4, 1                # encoding: [0x7c,0x43,0x20,0x29]
+# CHECK-LE: lwarx 2, 3, 4, 1                # encoding: [0x29,0x20,0x43,0x7c]
+            lwarx 2, 3, 4, 1
+
+# CHECK-BE: ldarx 2, 3, 4, 1                # encoding: [0x7c,0x43,0x20,0xa9]
+# CHECK-LE: ldarx 2, 3, 4, 1                # encoding: [0xa9,0x20,0x43,0x7c]
+            ldarx 2, 3, 4, 1
+
 # CHECK-BE: sync 0                          # encoding: [0x7c,0x00,0x04,0xac]
 # CHECK-LE: sync 0                          # encoding: [0xac,0x04,0x00,0x7c]
             sync