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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-04-29 09:13:53 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-04-29 09:13:53 +0000 |
| commit | 07a691c706de349599ee5039ba9b36d1b0c4a27b (patch) | |
| tree | 47f6bfc6e12125b6f21823fb92b94c2a55996f4b /llvm/test | |
| parent | 4f672a34edfd8440a896d26c28b08ab1d52e5238 (diff) | |
| download | bcm5719-llvm-07a691c706de349599ee5039ba9b36d1b0c4a27b.tar.gz bcm5719-llvm-07a691c706de349599ee5039ba9b36d1b0c4a27b.zip | |
[InstCombine][SSE] Added x86 pshufb undef mask tests
FIXME: We currently don't support folding constant pshufb shuffle masks containing undef elements.
llvm-svn: 268016
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/x86-pshufb.ll | 38 |
1 files changed, 37 insertions, 1 deletions
diff --git a/llvm/test/Transforms/InstCombine/x86-pshufb.ll b/llvm/test/Transforms/InstCombine/x86-pshufb.ll index 98eb140b93d..4ad3e1f7ddc 100644 --- a/llvm/test/Transforms/InstCombine/x86-pshufb.ll +++ b/llvm/test/Transforms/InstCombine/x86-pshufb.ll @@ -19,7 +19,6 @@ define <32 x i8> @identity_test_avx2(<32 x i8> %InVec) { ret <32 x i8> %1 } - ; Verify that instcombine is able to fold byte shuffles with zero masks. define <16 x i8> @fold_to_zero_vector(<16 x i8> %InVec) { @@ -285,6 +284,43 @@ define <32 x i8> @permute3_avx2(<32 x i8> %InVec) { ret <32 x i8> %1 } +; FIXME: Verify that instcombine is able to fold constant byte shuffles with undef mask elements. + +define <16 x i8> @fold_with_undef_elts(<16 x i8> %InVec) { +; CHECK-LABEL: @fold_with_undef_elts( +; CHECK-NEXT: [[TMP1:%.*]] = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128>) +; CHECK-NEXT: ret <16 x i8> [[TMP1]] +; + %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> <i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128>) + ret <16 x i8> %1 +} + +define <32 x i8> @fold_with_undef_elts_avx2(<32 x i8> %InVec) { +; CHECK-LABEL: @fold_with_undef_elts_avx2( +; CHECK-NEXT: [[TMP1:%.*]] = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128, i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128>) +; CHECK-NEXT: ret <32 x i8> [[TMP1]] +; + %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> <i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128, i8 0, i8 -128, i8 undef, i8 -128, i8 1, i8 -128, i8 undef, i8 -128, i8 2, i8 -128, i8 undef, i8 -128, i8 3, i8 -128, i8 undef, i8 -128>) + ret <32 x i8> %1 +} + +define <16 x i8> @fold_with_allundef_elts(<16 x i8> %InVec) { +; CHECK-LABEL: @fold_with_allundef_elts( +; CHECK-NEXT: [[TMP1:%.*]] = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> undef) +; CHECK-NEXT: ret <16 x i8> [[TMP1]] +; + %1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> undef) + ret <16 x i8> %1 +} + +define <32 x i8> @fold_with_allundef_elts_avx2(<32 x i8> %InVec) { +; CHECK-LABEL: @fold_with_allundef_elts_avx2( +; CHECK-NEXT: [[TMP1:%.*]] = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> undef) +; CHECK-NEXT: ret <32 x i8> [[TMP1]] +; + %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %InVec, <32 x i8> undef) + ret <32 x i8> %1 +} declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) declare <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8>, <32 x i8>) |
