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authorMatt Arsenault <Matthew.Arsenault@amd.com>2014-05-01 16:37:52 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2014-05-01 16:37:52 +0000
commit06028dd7be41bf55c11d3045314dc71082346c8e (patch)
tree5182340c7552428bbaa6d7a81a0e17f4133051d2 /llvm/test
parentffc1c6af499c0744d8862c6f01b1224df7fe29ce (diff)
downloadbcm5719-llvm-06028dd7be41bf55c11d3045314dc71082346c8e.tar.gz
bcm5719-llvm-06028dd7be41bf55c11d3045314dc71082346c8e.zip
R600/SI: Fix verifier error with pseudo store instructions.
Use i32 instead of specifying SReg_32. When this is the pseudo INDIRECT_BASE_ADDR, this would give a bogus verifier error. llvm-svn: 207770
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/R600/array-ptr-calc-i32.ll2
-rw-r--r--llvm/test/CodeGen/R600/insert_vector_elt.ll2
-rw-r--r--llvm/test/CodeGen/R600/private-memory.ll4
3 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/R600/array-ptr-calc-i32.ll b/llvm/test/CodeGen/R600/array-ptr-calc-i32.ll
index cb2a1c80a16..c2362da15cd 100644
--- a/llvm/test/CodeGen/R600/array-ptr-calc-i32.ll
+++ b/llvm/test/CodeGen/R600/array-ptr-calc-i32.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -verify-machineinstrs -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
declare i32 @llvm.SI.tid() nounwind readnone
declare void @llvm.AMDGPU.barrier.local() nounwind noduplicate
diff --git a/llvm/test/CodeGen/R600/insert_vector_elt.ll b/llvm/test/CodeGen/R600/insert_vector_elt.ll
index 03cd83a2a60..43b4efc9337 100644
--- a/llvm/test/CodeGen/R600/insert_vector_elt.ll
+++ b/llvm/test/CodeGen/R600/insert_vector_elt.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -verify-machineinstrs -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
; FIXME: Broken on evergreen
; FIXME: For some reason the 8 and 16 vectors are being stored as
diff --git a/llvm/test/CodeGen/R600/private-memory.ll b/llvm/test/CodeGen/R600/private-memory.ll
index 6543ab7a597..d3453f26aee 100644
--- a/llvm/test/CodeGen/R600/private-memory.ll
+++ b/llvm/test/CodeGen/R600/private-memory.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK --check-prefix=FUNC
-; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC
+; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s --check-prefix=R600-CHECK --check-prefix=FUNC
+; RUN: llc -verify-machineinstrs -march=r600 -mcpu=SI < %s | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC
; This test checks that uses and defs of the AR register happen in the same
; instruction clause.
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