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| author | Sanjay Patel <spatel@rotateright.com> | 2017-02-12 23:07:52 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2017-02-12 23:07:52 +0000 |
| commit | 0557a44287f4796707323e22732ebed9c3f7b905 (patch) | |
| tree | e508ae739458af81628c15377caa28ae210f21e3 /llvm/test | |
| parent | 31e1b8fe482970e11cb61b432bd24b4840b7e373 (diff) | |
| download | bcm5719-llvm-0557a44287f4796707323e22732ebed9c3f7b905.tar.gz bcm5719-llvm-0557a44287f4796707323e22732ebed9c3f7b905.zip | |
[TargetLowering] fix SETCC SETLT folding with FP types
The bug was introduced with:
https://reviews.llvm.org/rL294863
...and manifests as a selection failure in x86, but that's actually
another bug. This fix prevents wrong codegen with -0.0, but in the
more common case when we have NSZ and NNAN (-ffast-math), we should
still be able to fold this setcc/compare.
llvm-svn: 294924
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/vselect-pcmp.ll | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/vselect-pcmp.ll b/llvm/test/CodeGen/X86/vselect-pcmp.ll index 3958c414e9a..667bcde6b46 100644 --- a/llvm/test/CodeGen/X86/vselect-pcmp.ll +++ b/llvm/test/CodeGen/X86/vselect-pcmp.ll @@ -317,3 +317,27 @@ define <8 x double> @signbit_sel_v8f64(<8 x double> %x, <8 x double> %y, <8 x i6 ret <8 x double> %z } +; If we have a floating-point compare: +; (1) Don't die. +; (2) FIXME: If we don't care about signed-zero (and NaN?), the compare should still get folded. + +define <4 x float> @signbit_sel_v4f32_fcmp(<4 x float> %x, <4 x float> %y, <4 x float> %mask) #0 { +; AVX12F-LABEL: signbit_sel_v4f32_fcmp: +; AVX12F: # BB#0: +; AVX12F-NEXT: vxorps %xmm2, %xmm2, %xmm2 +; AVX12F-NEXT: vcmpltps %xmm2, %xmm0, %xmm2 +; AVX12F-NEXT: vblendvps %xmm2, %xmm0, %xmm1, %xmm0 +; AVX12F-NEXT: retq +; +; AVX512VL-LABEL: signbit_sel_v4f32_fcmp: +; AVX512VL: # BB#0: +; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2 +; AVX512VL-NEXT: vcmpltps %xmm2, %xmm0, %k1 +; AVX512VL-NEXT: vblendmps %xmm0, %xmm1, %xmm0 {%k1} +; AVX512VL-NEXT: retq + %cmp = fcmp olt <4 x float> %x, zeroinitializer + %sel = select <4 x i1> %cmp, <4 x float> %x, <4 x float> %y + ret <4 x float> %sel +} + +attributes #0 = { "no-nans-fp-math"="true" } |

