summaryrefslogtreecommitdiffstats
path: root/llvm/test
diff options
context:
space:
mode:
authorMatt Arsenault <Matthew.Arsenault@amd.com>2019-09-09 16:03:45 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2019-09-09 16:03:45 +0000
commit02eb308387d73de035492c0ae56ce167eaa97a5f (patch)
tree0f9b5d2ba497fce8e181b90f79a7eed5fd34d3bd /llvm/test
parentebbd6e49768271297d17bcecd22eae2128e24e26 (diff)
downloadbcm5719-llvm-02eb308387d73de035492c0ae56ce167eaa97a5f.tar.gz
bcm5719-llvm-02eb308387d73de035492c0ae56ce167eaa97a5f.zip
AMDGPU/GlobalISel: Fix regbankselect for uniform extloads
There are no scalar extloads. llvm-svn: 371414
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir103
1 files changed, 85 insertions, 18 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
index fd4d47e979b..1370ed3fa5f 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
@@ -61,13 +61,17 @@
define amdgpu_kernel void @load_constant_v8i64_uniform() {ret void}
define amdgpu_kernel void @load_local_uniform() { ret void }
define amdgpu_kernel void @load_region_uniform() { ret void }
+ define amdgpu_kernel void @extload_constant_i8_to_i32_uniform() { ret void }
+ define amdgpu_kernel void @extload_global_i8_to_i32_uniform() { ret void }
+ define amdgpu_kernel void @extload_constant_i16_to_i32_uniform() { ret void }
+ define amdgpu_kernel void @extload_global_i16_to_i32_uniform() { ret void }
declare i32 @llvm.amdgcn.workitem.id.x() #0
attributes #0 = { nounwind readnone }
...
---
-name : load_global_v8i32_non_uniform
+name: load_global_v8i32_non_uniform
legalized: true
body: |
@@ -102,7 +106,7 @@ body: |
...
---
-name : load_global_v4i64_non_uniform
+name: load_global_v4i64_non_uniform
legalized: true
body: |
@@ -129,7 +133,7 @@ body: |
...
---
-name : load_global_v16i32_non_uniform
+name: load_global_v16i32_non_uniform
legalized: true
body: |
@@ -185,7 +189,7 @@ body: |
%1:_(<16 x s32>) = G_LOAD %0 :: (load 64 from %ir.global.not.uniform.v16i32)
...
-name : load_global_v8i64_non_uniform
+name: load_global_v8i64_non_uniform
legalized: true
body: |
@@ -226,7 +230,7 @@ body: |
...
---
-name : load_global_v8i32_uniform
+name: load_global_v8i32_uniform
legalized: true
body: |
@@ -239,7 +243,7 @@ body: |
...
---
-name : load_global_v4i64_uniform
+name: load_global_v4i64_uniform
legalized: true
body: |
@@ -252,7 +256,7 @@ body: |
...
---
-name : load_global_v16i32_uniform
+name: load_global_v16i32_uniform
legalized: true
body: |
@@ -265,7 +269,7 @@ body: |
...
---
-name : load_global_v8i64_uniform
+name: load_global_v8i64_uniform
legalized: true
body: |
@@ -278,7 +282,7 @@ body: |
...
---
-name : load_constant_v8i32_non_uniform
+name: load_constant_v8i32_non_uniform
legalized: true
body: |
@@ -313,7 +317,7 @@ body: |
...
---
-name : load_constant_v4i64_non_uniform
+name: load_constant_v4i64_non_uniform
legalized: true
body: |
@@ -340,7 +344,7 @@ body: |
...
---
-name : load_constant_v16i32_non_uniform
+name: load_constant_v16i32_non_uniform
legalized: true
body: |
@@ -397,7 +401,7 @@ body: |
...
---
-name : load_constant_v8i64_non_uniform
+name: load_constant_v8i64_non_uniform
legalized: true
body: |
@@ -438,7 +442,7 @@ body: |
...
---
-name : load_constant_v8i32_uniform
+name: load_constant_v8i32_uniform
legalized: true
body: |
@@ -451,7 +455,7 @@ body: |
...
---
-name : load_constant_v4i64_uniform
+name: load_constant_v4i64_uniform
legalized: true
body: |
@@ -464,7 +468,7 @@ body: |
...
---
-name : load_constant_v16i32_uniform
+name: load_constant_v16i32_uniform
legalized: true
body: |
@@ -477,7 +481,7 @@ body: |
...
---
-name : load_constant_v8i64_uniform
+name: load_constant_v8i64_uniform
legalized: true
body: |
@@ -490,7 +494,7 @@ body: |
...
---
-name : load_local_uniform
+name: load_local_uniform
legalized: true
body: |
bb.0:
@@ -505,7 +509,7 @@ body: |
...
---
-name : load_region_uniform
+name: load_region_uniform
legalized: true
body: |
bb.0:
@@ -519,3 +523,66 @@ body: |
%1:_(s32) = G_LOAD %0 :: (load 4, addrspace 5)
...
+
+---
+name: extload_constant_i8_to_i32_uniform
+legalized: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0_sgpr1
+ ; CHECK-LABEL: name: extload_constant_i8_to_i32_uniform
+ ; CHECK: %0:sgpr(p4) = COPY $sgpr0_sgpr1
+ ; CHECK: %2:vgpr(p4) = COPY %0(p4)
+ ; CHECK: %1:vgpr(s32) = G_LOAD %2(p4) :: (load 1, addrspace 4)
+ %0:_(p4) = COPY $sgpr0_sgpr1
+ %1:_(s32) = G_LOAD %0 :: (load 1, addrspace 4, align 1)
+...
+
+---
+name: extload_global_i8_to_i32_uniform
+legalized: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0_sgpr1
+
+ ; CHECK-LABEL: name: extload_global_i8_to_i32_uniform{{$}}
+ ; CHECK: %0:sgpr(p4) = COPY $sgpr0_sgpr1
+ ; CHECK: %2:vgpr(p4) = COPY %0(p4)
+ ; CHECK: %1:vgpr(s32) = G_LOAD %2(p4) :: (load 1, addrspace 1)
+ %0:_(p4) = COPY $sgpr0_sgpr1
+ %1:_(s32) = G_LOAD %0 :: (load 1, addrspace 1, align 1)
+...
+
+---
+name: extload_constant_i16_to_i32_uniform
+legalized: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0_sgpr1
+ ; CHECK-LABEL: name: extload_constant_i16_to_i32_uniform
+ ; CHECK: %0:sgpr(p4) = COPY $sgpr0_sgpr1
+ ; CHECK: %2:vgpr(p4) = COPY %0(p4)
+ ; CHECK: %1:vgpr(s32) = G_LOAD %2(p4) :: (load 2, addrspace 4)
+
+ %0:_(p4) = COPY $sgpr0_sgpr1
+ %1:_(s32) = G_LOAD %0 :: (load 2, addrspace 4, align 2)
+...
+
+---
+name: extload_global_i16_to_i32_uniform
+legalized: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0_sgpr1
+ ; CHECK-LABEL: name: extload_global_i16_to_i32_uniform
+ ; CHECK: %0:sgpr(p4) = COPY $sgpr0_sgpr1
+ ; CHECK: %2:vgpr(p4) = COPY %0(p4)
+ ; CHECK: %1:vgpr(s32) = G_LOAD %2(p4) :: (load 2, addrspace 1)
+
+ %0:_(p4) = COPY $sgpr0_sgpr1
+ %1:_(s32) = G_LOAD %0 :: (load 2, addrspace 1, align 2)
+...
OpenPOWER on IntegriCloud