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author | David Goodwin <david_goodwin@apple.com> | 2009-10-22 23:19:17 +0000 |
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committer | David Goodwin <david_goodwin@apple.com> | 2009-10-22 23:19:17 +0000 |
commit | 02ad4cb32e5aefaf20d2f9a7794e7bd2e768b08b (patch) | |
tree | 83bfeb76baa03f60e20e611bf9cc8a4cb641bc35 /llvm/test | |
parent | ffba662dd275d1bdd5a5935f4d3cc372b5235d07 (diff) | |
download | bcm5719-llvm-02ad4cb32e5aefaf20d2f9a7794e7bd2e768b08b.tar.gz bcm5719-llvm-02ad4cb32e5aefaf20d2f9a7794e7bd2e768b08b.zip |
Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none.
llvm-svn: 84911
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/CodeGen/X86/2007-01-08-InstrSched.ll | 6 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/sse2.ll | 8 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/sse3.ll | 4 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/vshift-1.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/vshift-2.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/vshift-3.ll | 2 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/vshift-5.ll | 4 |
7 files changed, 14 insertions, 14 deletions
diff --git a/llvm/test/CodeGen/X86/2007-01-08-InstrSched.ll b/llvm/test/CodeGen/X86/2007-01-08-InstrSched.ll index 81f0a1d7244..1eae2d2f209 100644 --- a/llvm/test/CodeGen/X86/2007-01-08-InstrSched.ll +++ b/llvm/test/CodeGen/X86/2007-01-08-InstrSched.ll @@ -11,11 +11,11 @@ define float @foo(float %x) nounwind { %tmp14 = fadd float %tmp12, %tmp7 ret float %tmp14 -; CHECK: mulss LCPI1_3(%rip) -; CHECK-NEXT: mulss LCPI1_0(%rip) +; CHECK: mulss LCPI1_0(%rip) ; CHECK-NEXT: mulss LCPI1_1(%rip) -; CHECK-NEXT: mulss LCPI1_2(%rip) ; CHECK-NEXT: addss +; CHECK: mulss LCPI1_3(%rip) +; CHECK-NEXT: mulss LCPI1_2(%rip) ; CHECK-NEXT: addss ; CHECK-NEXT: addss ; CHECK-NEXT: ret diff --git a/llvm/test/CodeGen/X86/sse2.ll b/llvm/test/CodeGen/X86/sse2.ll index 58fe28b09fe..a3faada6615 100644 --- a/llvm/test/CodeGen/X86/sse2.ll +++ b/llvm/test/CodeGen/X86/sse2.ll @@ -10,10 +10,10 @@ define void @t1(<2 x double>* %r, <2 x double>* %A, double %B) nounwind { ; CHECK: t1: ; CHECK: movl 8(%esp), %eax -; CHECK-NEXT: movl 4(%esp), %ecx ; CHECK-NEXT: movapd (%eax), %xmm0 +; CHECK-NEXT: movl 4(%esp), %eax ; CHECK-NEXT: movlpd 12(%esp), %xmm0 -; CHECK-NEXT: movapd %xmm0, (%ecx) +; CHECK-NEXT: movapd %xmm0, (%eax) ; CHECK-NEXT: ret } @@ -26,9 +26,9 @@ define void @t2(<2 x double>* %r, <2 x double>* %A, double %B) nounwind { ; CHECK: t2: ; CHECK: movl 8(%esp), %eax -; CHECK-NEXT: movl 4(%esp), %ecx ; CHECK-NEXT: movapd (%eax), %xmm0 +; CHECK-NEXT: movl 4(%esp), %eax ; CHECK-NEXT: movhpd 12(%esp), %xmm0 -; CHECK-NEXT: movapd %xmm0, (%ecx) +; CHECK-NEXT: movapd %xmm0, (%eax) ; CHECK-NEXT: ret } diff --git a/llvm/test/CodeGen/X86/sse3.ll b/llvm/test/CodeGen/X86/sse3.ll index 6319cb887af..f43e5a34aea 100644 --- a/llvm/test/CodeGen/X86/sse3.ll +++ b/llvm/test/CodeGen/X86/sse3.ll @@ -168,11 +168,11 @@ define internal void @t10() nounwind { ret void ; X64: t10: ; X64: pextrw $4, %xmm0, %eax -; X64: pextrw $6, %xmm0, %edx ; X64: movlhps %xmm1, %xmm1 ; X64: pshuflw $8, %xmm1, %xmm1 ; X64: pinsrw $2, %eax, %xmm1 -; X64: pinsrw $3, %edx, %xmm1 +; X64: pextrw $6, %xmm0, %eax +; X64: pinsrw $3, %eax, %xmm1 } diff --git a/llvm/test/CodeGen/X86/vshift-1.ll b/llvm/test/CodeGen/X86/vshift-1.ll index ae845e0a33d..edcff6a7e7b 100644 --- a/llvm/test/CodeGen/X86/vshift-1.ll +++ b/llvm/test/CodeGen/X86/vshift-1.ll @@ -63,7 +63,7 @@ entry: ; CHECK: shift3b: ; CHECK: movzwl ; CHECK: movd -; CHECK-NEXT: psllw +; CHECK: psllw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 diff --git a/llvm/test/CodeGen/X86/vshift-2.ll b/llvm/test/CodeGen/X86/vshift-2.ll index 36feb11603d..be8972f2f4e 100644 --- a/llvm/test/CodeGen/X86/vshift-2.ll +++ b/llvm/test/CodeGen/X86/vshift-2.ll @@ -63,7 +63,7 @@ entry: ; CHECK: shift3b: ; CHECK: movzwl ; CHECK: movd -; CHECK-NEXT: psrlw +; CHECK: psrlw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 diff --git a/llvm/test/CodeGen/X86/vshift-3.ll b/llvm/test/CodeGen/X86/vshift-3.ll index 20d3f48a1a6..bdb5af133e8 100644 --- a/llvm/test/CodeGen/X86/vshift-3.ll +++ b/llvm/test/CodeGen/X86/vshift-3.ll @@ -52,7 +52,7 @@ entry: ; CHECK: shift3b: ; CHECK: movzwl ; CHECK: movd -; CHECK-NEXT: psraw +; CHECK: psraw %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 %2 = insertelement <8 x i16> %0, i16 %amt, i32 2 diff --git a/llvm/test/CodeGen/X86/vshift-5.ll b/llvm/test/CodeGen/X86/vshift-5.ll index a543f382b51..675e33ffb33 100644 --- a/llvm/test/CodeGen/X86/vshift-5.ll +++ b/llvm/test/CodeGen/X86/vshift-5.ll @@ -6,7 +6,7 @@ define void @shift5a(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind { entry: ; CHECK: shift5a: ; CHECK: movd -; CHECK-NEXT: pslld +; CHECK: pslld %amt = load i32* %pamt %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer @@ -20,7 +20,7 @@ define void @shift5b(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind { entry: ; CHECK: shift5b: ; CHECK: movd -; CHECK-NEXT: psrad +; CHECK: psrad %amt = load i32* %pamt %tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0 %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer |