diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-07-27 09:15:03 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-07-27 09:15:03 +0000 |
| commit | 0183c56c11b4a6c3a66b5b1db44aa3582fe7f15b (patch) | |
| tree | 1b3458ca829355e7d8531f97f3ac749f1bcdad0b /llvm/test | |
| parent | 611dff423c05c97649838d0136fd9e1c0a6afd90 (diff) | |
| download | bcm5719-llvm-0183c56c11b4a6c3a66b5b1db44aa3582fe7f15b.tar.gz bcm5719-llvm-0183c56c11b4a6c3a66b5b1db44aa3582fe7f15b.zip | |
AMDGPU: Fix code size for return_to_epilog pseudo
llvm-svn: 338113
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/ret.ll | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/ret.ll b/llvm/test/CodeGen/AMDGPU/ret.ll index deedf365d2c..265d37e8d64 100644 --- a/llvm/test/CodeGen/AMDGPU/ret.ll +++ b/llvm/test/CodeGen/AMDGPU/ret.ll @@ -241,6 +241,12 @@ bb: ret { { float, i32 }, { i32, <2 x float> } } { { float, i32 } { float 1.000000e+00, i32 2 }, { i32, <2 x float> } { i32 3, <2 x float> <float 2.000000e+00, float 4.000000e+00> } } } +; GCN-LABEL: {{^}}ret_return_to_epilog_pseudo_size: +; GCN: codeLenInByte = 0{{$}} +define amdgpu_ps float @ret_return_to_epilog_pseudo_size() #0 { + ret float undef +} + declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #0 attributes #0 = { nounwind } |
