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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-09-18 14:23:23 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-09-18 14:23:23 +0000 |
| commit | 00161c996106ff151227b8fc63e08597d58a3e7d (patch) | |
| tree | a9ee19baba2c870506434af58e93be505f37561b /llvm/test | |
| parent | 4e6df159621fd578e7380732b3965dc9eab4bbf4 (diff) | |
| download | bcm5719-llvm-00161c996106ff151227b8fc63e08597d58a3e7d.tar.gz bcm5719-llvm-00161c996106ff151227b8fc63e08597d58a3e7d.zip | |
[X86][SSE] Improve support for vselect(Cond, 0, X) -> ANDN(Cond, X)
As discussed on PR28925 and D37849.
Differential Revision: https://reviews.llvm.org/D37975
llvm-svn: 313532
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/psubus.ll | 10 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/vselect-zero.ll | 24 |
2 files changed, 11 insertions, 23 deletions
diff --git a/llvm/test/CodeGen/X86/psubus.ll b/llvm/test/CodeGen/X86/psubus.ll index acd4b75254c..bc7bbb539bd 100644 --- a/llvm/test/CodeGen/X86/psubus.ll +++ b/llvm/test/CodeGen/X86/psubus.ll @@ -683,9 +683,7 @@ define <16 x i8> @test14(<16 x i8> %x, <16 x i32> %y) nounwind { ; SSE41-NEXT: pand %xmm5, %xmm2 ; SSE41-NEXT: packuswb %xmm2, %xmm1 ; SSE41-NEXT: packuswb %xmm3, %xmm1 -; SSE41-NEXT: pxor %xmm2, %xmm2 -; SSE41-NEXT: pblendvb %xmm0, %xmm2, %xmm1 -; SSE41-NEXT: movdqa %xmm1, %xmm0 +; SSE41-NEXT: pandn %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: test14: @@ -727,8 +725,7 @@ define <16 x i8> @test14(<16 x i8> %x, <16 x i32> %y) nounwind { ; AVX1-NEXT: vpand %xmm5, %xmm4, %xmm2 ; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 ; AVX1-NEXT: vpackuswb %xmm0, %xmm1, %xmm0 -; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 -; AVX1-NEXT: vpblendvb %xmm3, %xmm1, %xmm0, %xmm0 +; AVX1-NEXT: vpandn %xmm0, %xmm3, %xmm0 ; AVX1-NEXT: vzeroupper ; AVX1-NEXT: retq ; @@ -760,8 +757,7 @@ define <16 x i8> @test14(<16 x i8> %x, <16 x i32> %y) nounwind { ; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] ; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 ; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] -; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 -; AVX2-NEXT: vpblendvb %xmm4, %xmm1, %xmm0, %xmm0 +; AVX2-NEXT: vpandn %xmm0, %xmm4, %xmm0 ; AVX2-NEXT: vzeroupper ; AVX2-NEXT: retq vector.ph: diff --git a/llvm/test/CodeGen/X86/vselect-zero.ll b/llvm/test/CodeGen/X86/vselect-zero.ll index 5a1d118ee6e..400933a9aff 100644 --- a/llvm/test/CodeGen/X86/vselect-zero.ll +++ b/llvm/test/CodeGen/X86/vselect-zero.ll @@ -7,26 +7,18 @@ ; PR28925 define <4 x i32> @test1(<4 x i1> %cond, <4 x i32> %x) { -; SSE2-LABEL: test1: -; SSE2: # BB#0: -; SSE2-NEXT: pslld $31, %xmm0 -; SSE2-NEXT: psrad $31, %xmm0 -; SSE2-NEXT: pandn %xmm1, %xmm0 -; SSE2-NEXT: retq -; -; SSE42-LABEL: test1: -; SSE42: # BB#0: -; SSE42-NEXT: pslld $31, %xmm0 -; SSE42-NEXT: xorps %xmm2, %xmm2 -; SSE42-NEXT: blendvps %xmm0, %xmm2, %xmm1 -; SSE42-NEXT: movaps %xmm1, %xmm0 -; SSE42-NEXT: retq +; SSE-LABEL: test1: +; SSE: # BB#0: +; SSE-NEXT: pslld $31, %xmm0 +; SSE-NEXT: psrad $31, %xmm0 +; SSE-NEXT: pandn %xmm1, %xmm0 +; SSE-NEXT: retq ; ; AVX-LABEL: test1: ; AVX: # BB#0: ; AVX-NEXT: vpslld $31, %xmm0, %xmm0 -; AVX-NEXT: vxorps %xmm2, %xmm2, %xmm2 -; AVX-NEXT: vblendvps %xmm0, %xmm2, %xmm1, %xmm0 +; AVX-NEXT: vpsrad $31, %xmm0, %xmm0 +; AVX-NEXT: vpandn %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %r = select <4 x i1> %cond, <4 x i32> zeroinitializer, <4 x i32> %x ret <4 x i32> %r |
