diff options
| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2018-10-12 11:23:04 +0000 |
|---|---|---|
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2018-10-12 11:23:04 +0000 |
| commit | 6eebbe0a971f7c350571c3788111da14198d01f2 (patch) | |
| tree | fe22600a6f0ccf9854943112781ca7719fd8cafa /llvm/test/tools | |
| parent | e02d09d3db6e5c9d0f5f0a384179e9cf6bec87a4 (diff) | |
| download | bcm5719-llvm-6eebbe0a971f7c350571c3788111da14198d01f2.tar.gz bcm5719-llvm-6eebbe0a971f7c350571c3788111da14198d01f2.zip | |
[tblgen][llvm-mca] Add the ability to describe move elimination candidates via tablegen.
This patch adds the ability to identify instructions that are "move elimination
candidates". It also allows scheduling models to describe processor register
files that allow move elimination.
A move elimination candidate is an instruction that can be eliminated at
register renaming stage.
Each subtarget can specify which instructions are move elimination candidates
with the help of tablegen class "IsOptimizableRegisterMove" (see
llvm/Target/TargetInstrPredicate.td).
For example, on X86, BtVer2 allows both GPR and MMX/SSE moves to be eliminated.
The definition of 'IsOptimizableRegisterMove' for BtVer2 looks like this:
```
def : IsOptimizableRegisterMove<[
InstructionEquivalenceClass<[
// GPR variants.
MOV32rr, MOV64rr,
// MMX variants.
MMX_MOVQ64rr,
// SSE variants.
MOVAPSrr, MOVUPSrr,
MOVAPDrr, MOVUPDrr,
MOVDQArr, MOVDQUrr,
// AVX variants.
VMOVAPSrr, VMOVUPSrr,
VMOVAPDrr, VMOVUPDrr,
VMOVDQArr, VMOVDQUrr
], CheckNot<CheckSameRegOperand<0, 1>> >
]>;
```
Definitions of IsOptimizableRegisterMove from processor models of a same
Target are processed by the SubtargetEmitter to auto-generate a target-specific
override for each of the following predicate methods:
```
bool TargetSubtargetInfo::isOptimizableRegisterMove(const MachineInstr *MI)
const;
bool MCInstrAnalysis::isOptimizableRegisterMove(const MCInst &MI, unsigned
CPUID) const;
```
By default, those methods return false (i.e. conservatively assume that there
are no move elimination candidates).
Tablegen class RegisterFile has been extended with the following information:
- The set of register classes that allow move elimination.
- Maxium number of moves that can be eliminated every cycle.
- Whether move elimination is restricted to moves from registers that are
known to be zero.
This patch is structured in three part:
A first part (which is mostly boilerplate) adds the new
'isOptimizableRegisterMove' target hooks, and extends existing register file
descriptors in MC by introducing new fields to describe properties related to
move elimination.
A second part, uses the new tablegen constructs to describe move elimination in
the BtVer2 scheduling model.
A third part, teaches llm-mca how to query the new 'isOptimizableRegisterMove'
hook to mark instructions that are candidates for move elimination. It also
teaches class RegisterFile how to describe constraints on move elimination at
PRF granularity.
llvm-mca tests for btver2 show differences before/after this patch.
Differential Revision: https://reviews.llvm.org/D53134
llvm-svn: 344334
Diffstat (limited to 'llvm/test/tools')
5 files changed, 173 insertions, 175 deletions
diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-1.s b/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-1.s index d2588bef30e..3b38173ebca 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-1.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-1.s @@ -32,13 +32,13 @@ vaddps %xmm1, %xmm1, %xmm2 # CHECK-NEXT: 1 3 1.00 vaddps %xmm1, %xmm1, %xmm2 # CHECK: Register File statistics: -# CHECK-NEXT: Total number of mappings created: 6 -# CHECK-NEXT: Max number of mappings used: 5 +# CHECK-NEXT: Total number of mappings created: 3 +# CHECK-NEXT: Max number of mappings used: 3 # CHECK: * Register File #1 -- JFpuPRF: # CHECK-NEXT: Number of physical registers: 72 -# CHECK-NEXT: Total number of mappings created: 6 -# CHECK-NEXT: Max number of mappings used: 5 +# CHECK-NEXT: Total number of mappings created: 3 +# CHECK-NEXT: Max number of mappings used: 3 # CHECK: * Register File #2 -- JIntegerPRF: # CHECK-NEXT: Number of physical registers: 64 @@ -63,25 +63,25 @@ vaddps %xmm1, %xmm1, %xmm2 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] -# CHECK-NEXT: - - - 1.00 1.00 1.00 1.00 - - - - - - - +# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions: # CHECK-NEXT: - - - - - - - - - - - - - - vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: - - - - 1.00 - 1.00 - - - - - - - vmovaps %xmm0, %xmm1 +# CHECK-NEXT: - - - - - - - - - - - - - - vmovaps %xmm0, %xmm1 # CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - vaddps %xmm1, %xmm1, %xmm2 # CHECK: Timeline view: # CHECK-NEXT: Index 0123456789 # CHECK: [0,0] DR . . vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [0,1] DeER . . vmovaps %xmm0, %xmm1 +# CHECK-NEXT: [0,1] DR . . vmovaps %xmm0, %xmm1 # CHECK-NEXT: [0,2] .DeeeER . vaddps %xmm1, %xmm1, %xmm2 # CHECK-NEXT: [1,0] .D----R . vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [1,1] . DeE--R . vmovaps %xmm0, %xmm1 -# CHECK-NEXT: [1,2] . D=eeeER. vaddps %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: [1,1] . D----R . vmovaps %xmm0, %xmm1 +# CHECK-NEXT: [1,2] . DeeeER . vaddps %xmm1, %xmm1, %xmm2 # CHECK-NEXT: [2,0] . D----R. vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [2,1] . DeE---R vmovaps %xmm0, %xmm1 +# CHECK-NEXT: [2,1] . D----R. vmovaps %xmm0, %xmm1 # CHECK-NEXT: [2,2] . DeeeER vaddps %xmm1, %xmm1, %xmm2 # CHECK: Average Wait times (based on the timeline view): @@ -92,5 +92,5 @@ vaddps %xmm1, %xmm1, %xmm2 # CHECK: [0] [1] [2] [3] # CHECK-NEXT: 0. 3 0.0 0.0 2.7 vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: 1. 3 1.0 1.0 1.7 vmovaps %xmm0, %xmm1 -# CHECK-NEXT: 2. 3 1.3 0.0 0.0 vaddps %xmm1, %xmm1, %xmm2 +# CHECK-NEXT: 1. 3 0.0 0.0 2.7 vmovaps %xmm0, %xmm1 +# CHECK-NEXT: 2. 3 1.0 1.0 0.0 vaddps %xmm1, %xmm1, %xmm2 diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-2.s b/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-2.s index 33cd3972194..096fe6c5a8f 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-2.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-2.s @@ -14,12 +14,12 @@ movdqu %xmm5, %xmm0 # CHECK: Iterations: 3 # CHECK-NEXT: Instructions: 27 -# CHECK-NEXT: Total Cycles: 19 +# CHECK-NEXT: Total Cycles: 15 # CHECK-NEXT: Total uOps: 27 # CHECK: Dispatch Width: 2 -# CHECK-NEXT: uOps Per Cycle: 1.42 -# CHECK-NEXT: IPC: 1.42 +# CHECK-NEXT: uOps Per Cycle: 1.80 +# CHECK-NEXT: IPC: 1.80 # CHECK-NEXT: Block RThroughput: 4.5 # CHECK: Instruction Info: @@ -42,13 +42,13 @@ movdqu %xmm5, %xmm0 # CHECK-NEXT: 1 1 0.50 movdqu %xmm5, %xmm0 # CHECK: Register File statistics: -# CHECK-NEXT: Total number of mappings created: 21 -# CHECK-NEXT: Max number of mappings used: 8 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: * Register File #1 -- JFpuPRF: # CHECK-NEXT: Number of physical registers: 72 -# CHECK-NEXT: Total number of mappings created: 21 -# CHECK-NEXT: Max number of mappings used: 8 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: * Register File #2 -- JIntegerPRF: # CHECK-NEXT: Number of physical registers: 64 @@ -73,51 +73,51 @@ movdqu %xmm5, %xmm0 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] -# CHECK-NEXT: - - - 2.00 2.00 3.33 3.67 - - - - 1.33 1.67 - +# CHECK-NEXT: - - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions: # CHECK-NEXT: - - - - - - - - - - - - - - pxor %mm0, %mm0 -# CHECK-NEXT: - - - - - - 1.00 - - - - - 1.00 - movq %mm0, %mm1 +# CHECK-NEXT: - - - - - - - - - - - - - - movq %mm0, %mm1 # CHECK-NEXT: - - - - - - - - - - - - - - xorps %xmm0, %xmm0 -# CHECK-NEXT: - - - - 1.00 0.33 0.67 - - - - - - - movaps %xmm0, %xmm1 -# CHECK-NEXT: - - - 1.00 - 0.33 0.67 - - - - - - - movups %xmm1, %xmm2 -# CHECK-NEXT: - - - - 1.00 0.67 0.33 - - - - - - - movapd %xmm2, %xmm3 -# CHECK-NEXT: - - - 1.00 - 0.33 0.67 - - - - - - - movupd %xmm3, %xmm4 -# CHECK-NEXT: - - - - - 1.00 - - - - - 1.00 - - movdqa %xmm4, %xmm5 -# CHECK-NEXT: - - - - - 0.67 0.33 - - - - 0.33 0.67 - movdqu %xmm5, %xmm0 +# CHECK-NEXT: - - - - - - - - - - - - - - movaps %xmm0, %xmm1 +# CHECK-NEXT: - - - - - - - - - - - - - - movups %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - movapd %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - - movupd %xmm3, %xmm4 +# CHECK-NEXT: - - - - - - - - - - - - - - movdqa %xmm4, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - movdqu %xmm5, %xmm0 # CHECK: Timeline view: -# CHECK-NEXT: 012345678 +# CHECK-NEXT: 01234 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DR . . . . pxor %mm0, %mm0 -# CHECK-NEXT: [0,1] DeER . . . . movq %mm0, %mm1 -# CHECK-NEXT: [0,2] .D-R . . . . xorps %xmm0, %xmm0 -# CHECK-NEXT: [0,3] .DeER. . . . movaps %xmm0, %xmm1 -# CHECK-NEXT: [0,4] . DeER . . . movups %xmm1, %xmm2 -# CHECK-NEXT: [0,5] . D=eER . . . movapd %xmm2, %xmm3 -# CHECK-NEXT: [0,6] . D=eER . . . movupd %xmm3, %xmm4 -# CHECK-NEXT: [0,7] . D==eER . . . movdqa %xmm4, %xmm5 -# CHECK-NEXT: [0,8] . D==eER. . . movdqu %xmm5, %xmm0 -# CHECK-NEXT: [1,0] . D----R. . . pxor %mm0, %mm0 -# CHECK-NEXT: [1,1] . DeE--R . . movq %mm0, %mm1 -# CHECK-NEXT: [1,2] . D----R . . xorps %xmm0, %xmm0 -# CHECK-NEXT: [1,3] . .DeE--R . . movaps %xmm0, %xmm1 -# CHECK-NEXT: [1,4] . .D=eE-R . . movups %xmm1, %xmm2 -# CHECK-NEXT: [1,5] . . D=eE-R . . movapd %xmm2, %xmm3 -# CHECK-NEXT: [1,6] . . D==eER . . movupd %xmm3, %xmm4 -# CHECK-NEXT: [1,7] . . D==eER . . movdqa %xmm4, %xmm5 -# CHECK-NEXT: [1,8] . . D===eER. . movdqu %xmm5, %xmm0 -# CHECK-NEXT: [2,0] . . D----R. . pxor %mm0, %mm0 -# CHECK-NEXT: [2,1] . . DeE---R . movq %mm0, %mm1 -# CHECK-NEXT: [2,2] . . D----R . xorps %xmm0, %xmm0 -# CHECK-NEXT: [2,3] . . DeE---R . movaps %xmm0, %xmm1 -# CHECK-NEXT: [2,4] . . .DeE--R . movups %xmm1, %xmm2 -# CHECK-NEXT: [2,5] . . .D=eE--R. movapd %xmm2, %xmm3 -# CHECK-NEXT: [2,6] . . . D=eE-R. movupd %xmm3, %xmm4 -# CHECK-NEXT: [2,7] . . . D==eE-R movdqa %xmm4, %xmm5 -# CHECK-NEXT: [2,8] . . . D==eER movdqu %xmm5, %xmm0 +# CHECK: [0,0] DR . . . pxor %mm0, %mm0 +# CHECK-NEXT: [0,1] DR . . . movq %mm0, %mm1 +# CHECK-NEXT: [0,2] .DR . . . xorps %xmm0, %xmm0 +# CHECK-NEXT: [0,3] .DR . . . movaps %xmm0, %xmm1 +# CHECK-NEXT: [0,4] . DR . . . movups %xmm1, %xmm2 +# CHECK-NEXT: [0,5] . DR . . . movapd %xmm2, %xmm3 +# CHECK-NEXT: [0,6] . DR. . . movupd %xmm3, %xmm4 +# CHECK-NEXT: [0,7] . DR. . . movdqa %xmm4, %xmm5 +# CHECK-NEXT: [0,8] . DR . . movdqu %xmm5, %xmm0 +# CHECK-NEXT: [1,0] . DR . . pxor %mm0, %mm0 +# CHECK-NEXT: [1,1] . DR . . movq %mm0, %mm1 +# CHECK-NEXT: [1,2] . DR . . xorps %xmm0, %xmm0 +# CHECK-NEXT: [1,3] . .DR . . movaps %xmm0, %xmm1 +# CHECK-NEXT: [1,4] . .DR . . movups %xmm1, %xmm2 +# CHECK-NEXT: [1,5] . . DR . . movapd %xmm2, %xmm3 +# CHECK-NEXT: [1,6] . . DR . . movupd %xmm3, %xmm4 +# CHECK-NEXT: [1,7] . . DR. . movdqa %xmm4, %xmm5 +# CHECK-NEXT: [1,8] . . DR. . movdqu %xmm5, %xmm0 +# CHECK-NEXT: [2,0] . . DR . pxor %mm0, %mm0 +# CHECK-NEXT: [2,1] . . DR . movq %mm0, %mm1 +# CHECK-NEXT: [2,2] . . DR . xorps %xmm0, %xmm0 +# CHECK-NEXT: [2,3] . . DR . movaps %xmm0, %xmm1 +# CHECK-NEXT: [2,4] . . .DR . movups %xmm1, %xmm2 +# CHECK-NEXT: [2,5] . . .DR . movapd %xmm2, %xmm3 +# CHECK-NEXT: [2,6] . . . DR. movupd %xmm3, %xmm4 +# CHECK-NEXT: [2,7] . . . DR. movdqa %xmm4, %xmm5 +# CHECK-NEXT: [2,8] . . . DR movdqu %xmm5, %xmm0 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -126,12 +126,12 @@ movdqu %xmm5, %xmm0 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 0.0 0.0 2.7 pxor %mm0, %mm0 -# CHECK-NEXT: 1. 3 1.0 1.0 1.7 movq %mm0, %mm1 -# CHECK-NEXT: 2. 3 0.0 0.0 3.0 xorps %xmm0, %xmm0 -# CHECK-NEXT: 3. 3 1.0 1.0 1.7 movaps %xmm0, %xmm1 -# CHECK-NEXT: 4. 3 1.3 0.0 1.0 movups %xmm1, %xmm2 -# CHECK-NEXT: 5. 3 2.0 0.0 1.0 movapd %xmm2, %xmm3 -# CHECK-NEXT: 6. 3 2.3 0.0 0.3 movupd %xmm3, %xmm4 -# CHECK-NEXT: 7. 3 3.0 0.0 0.3 movdqa %xmm4, %xmm5 -# CHECK-NEXT: 8. 3 3.3 0.0 0.0 movdqu %xmm5, %xmm0 +# CHECK-NEXT: 0. 3 0.0 0.0 0.0 pxor %mm0, %mm0 +# CHECK-NEXT: 1. 3 0.0 0.0 0.0 movq %mm0, %mm1 +# CHECK-NEXT: 2. 3 0.0 0.0 0.0 xorps %xmm0, %xmm0 +# CHECK-NEXT: 3. 3 0.0 0.0 0.0 movaps %xmm0, %xmm1 +# CHECK-NEXT: 4. 3 0.0 0.0 0.0 movups %xmm1, %xmm2 +# CHECK-NEXT: 5. 3 0.0 0.0 0.0 movapd %xmm2, %xmm3 +# CHECK-NEXT: 6. 3 0.0 0.0 0.0 movupd %xmm3, %xmm4 +# CHECK-NEXT: 7. 3 0.0 0.0 0.0 movdqa %xmm4, %xmm5 +# CHECK-NEXT: 8. 3 0.0 0.0 0.0 movdqu %xmm5, %xmm0 diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-3.s b/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-3.s index e3e0abc75e7..3d64bfd0bfd 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-3.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-3.s @@ -11,12 +11,12 @@ vmovdqu %xmm5, %xmm0 # CHECK: Iterations: 3 # CHECK-NEXT: Instructions: 21 -# CHECK-NEXT: Total Cycles: 16 +# CHECK-NEXT: Total Cycles: 12 # CHECK-NEXT: Total uOps: 21 # CHECK: Dispatch Width: 2 -# CHECK-NEXT: uOps Per Cycle: 1.31 -# CHECK-NEXT: IPC: 1.31 +# CHECK-NEXT: uOps Per Cycle: 1.75 +# CHECK-NEXT: IPC: 1.75 # CHECK-NEXT: Block RThroughput: 3.5 # CHECK: Instruction Info: @@ -37,13 +37,13 @@ vmovdqu %xmm5, %xmm0 # CHECK-NEXT: 1 1 0.50 vmovdqu %xmm5, %xmm0 # CHECK: Register File statistics: -# CHECK-NEXT: Total number of mappings created: 18 -# CHECK-NEXT: Max number of mappings used: 9 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: * Register File #1 -- JFpuPRF: # CHECK-NEXT: Number of physical registers: 72 -# CHECK-NEXT: Total number of mappings created: 18 -# CHECK-NEXT: Max number of mappings used: 9 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: * Register File #2 -- JIntegerPRF: # CHECK-NEXT: Number of physical registers: 64 @@ -68,43 +68,43 @@ vmovdqu %xmm5, %xmm0 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] -# CHECK-NEXT: - - - 2.00 2.00 3.00 3.00 - - - - 1.00 1.00 - +# CHECK-NEXT: - - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions: # CHECK-NEXT: - - - - - - - - - - - - - - vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: - - - - 1.00 0.33 0.67 - - - - - - - vmovaps %xmm0, %xmm1 -# CHECK-NEXT: - - - 1.00 - 0.67 0.33 - - - - - - - vmovups %xmm1, %xmm2 -# CHECK-NEXT: - - - - 1.00 - 1.00 - - - - - - - vmovapd %xmm2, %xmm3 -# CHECK-NEXT: - - - 1.00 - 1.00 - - - - - - - - vmovupd %xmm3, %xmm4 -# CHECK-NEXT: - - - - - 0.33 0.67 - - - - - 1.00 - vmovdqa %xmm4, %xmm5 -# CHECK-NEXT: - - - - - 0.67 0.33 - - - - 1.00 - - vmovdqu %xmm5, %xmm0 +# CHECK-NEXT: - - - - - - - - - - - - - - vmovaps %xmm0, %xmm1 +# CHECK-NEXT: - - - - - - - - - - - - - - vmovups %xmm1, %xmm2 +# CHECK-NEXT: - - - - - - - - - - - - - - vmovapd %xmm2, %xmm3 +# CHECK-NEXT: - - - - - - - - - - - - - - vmovupd %xmm3, %xmm4 +# CHECK-NEXT: - - - - - - - - - - - - - - vmovdqa %xmm4, %xmm5 +# CHECK-NEXT: - - - - - - - - - - - - - - vmovdqu %xmm5, %xmm0 # CHECK: Timeline view: -# CHECK-NEXT: 012345 +# CHECK-NEXT: 01 # CHECK-NEXT: Index 0123456789 -# CHECK: [0,0] DR . . . vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [0,1] DeER . . . vmovaps %xmm0, %xmm1 -# CHECK-NEXT: [0,2] .DeER. . . vmovups %xmm1, %xmm2 -# CHECK-NEXT: [0,3] .D=eER . . vmovapd %xmm2, %xmm3 -# CHECK-NEXT: [0,4] . D=eER . . vmovupd %xmm3, %xmm4 -# CHECK-NEXT: [0,5] . D==eER . . vmovdqa %xmm4, %xmm5 -# CHECK-NEXT: [0,6] . D==eER . . vmovdqu %xmm5, %xmm0 -# CHECK-NEXT: [1,0] . D----R . . vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [1,1] . DeE--R. . vmovaps %xmm0, %xmm1 -# CHECK-NEXT: [1,2] . D=eE-R. . vmovups %xmm1, %xmm2 -# CHECK-NEXT: [1,3] . D=eE-R . vmovapd %xmm2, %xmm3 -# CHECK-NEXT: [1,4] . D==eER . vmovupd %xmm3, %xmm4 -# CHECK-NEXT: [1,5] . .D==eER . vmovdqa %xmm4, %xmm5 -# CHECK-NEXT: [1,6] . .D===eER . vmovdqu %xmm5, %xmm0 -# CHECK-NEXT: [2,0] . . D----R . vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: [2,1] . . DeE---R . vmovaps %xmm0, %xmm1 -# CHECK-NEXT: [2,2] . . DeE--R . vmovups %xmm1, %xmm2 -# CHECK-NEXT: [2,3] . . D=eE--R. vmovapd %xmm2, %xmm3 -# CHECK-NEXT: [2,4] . . D=eE-R. vmovupd %xmm3, %xmm4 -# CHECK-NEXT: [2,5] . . D==eE-R vmovdqa %xmm4, %xmm5 -# CHECK-NEXT: [2,6] . . D==eER vmovdqu %xmm5, %xmm0 +# CHECK: [0,0] DR . .. vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [0,1] DR . .. vmovaps %xmm0, %xmm1 +# CHECK-NEXT: [0,2] .DR . .. vmovups %xmm1, %xmm2 +# CHECK-NEXT: [0,3] .DR . .. vmovapd %xmm2, %xmm3 +# CHECK-NEXT: [0,4] . DR . .. vmovupd %xmm3, %xmm4 +# CHECK-NEXT: [0,5] . DR . .. vmovdqa %xmm4, %xmm5 +# CHECK-NEXT: [0,6] . DR. .. vmovdqu %xmm5, %xmm0 +# CHECK-NEXT: [1,0] . DR. .. vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [1,1] . DR .. vmovaps %xmm0, %xmm1 +# CHECK-NEXT: [1,2] . DR .. vmovups %xmm1, %xmm2 +# CHECK-NEXT: [1,3] . DR .. vmovapd %xmm2, %xmm3 +# CHECK-NEXT: [1,4] . DR .. vmovupd %xmm3, %xmm4 +# CHECK-NEXT: [1,5] . .DR .. vmovdqa %xmm4, %xmm5 +# CHECK-NEXT: [1,6] . .DR .. vmovdqu %xmm5, %xmm0 +# CHECK-NEXT: [2,0] . . DR .. vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: [2,1] . . DR .. vmovaps %xmm0, %xmm1 +# CHECK-NEXT: [2,2] . . DR.. vmovups %xmm1, %xmm2 +# CHECK-NEXT: [2,3] . . DR.. vmovapd %xmm2, %xmm3 +# CHECK-NEXT: [2,4] . . DR. vmovupd %xmm3, %xmm4 +# CHECK-NEXT: [2,5] . . DR. vmovdqa %xmm4, %xmm5 +# CHECK-NEXT: [2,6] . . DR vmovdqu %xmm5, %xmm0 # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -113,10 +113,10 @@ vmovdqu %xmm5, %xmm0 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 0.0 0.0 2.7 vxorps %xmm0, %xmm0, %xmm0 -# CHECK-NEXT: 1. 3 1.0 1.0 1.7 vmovaps %xmm0, %xmm1 -# CHECK-NEXT: 2. 3 1.3 0.0 1.0 vmovups %xmm1, %xmm2 -# CHECK-NEXT: 3. 3 2.0 0.0 1.0 vmovapd %xmm2, %xmm3 -# CHECK-NEXT: 4. 3 2.3 0.0 0.3 vmovupd %xmm3, %xmm4 -# CHECK-NEXT: 5. 3 3.0 0.0 0.3 vmovdqa %xmm4, %xmm5 -# CHECK-NEXT: 6. 3 3.3 0.0 0.0 vmovdqu %xmm5, %xmm0 +# CHECK-NEXT: 0. 3 0.0 0.0 0.0 vxorps %xmm0, %xmm0, %xmm0 +# CHECK-NEXT: 1. 3 0.0 0.0 0.0 vmovaps %xmm0, %xmm1 +# CHECK-NEXT: 2. 3 0.0 0.0 0.0 vmovups %xmm1, %xmm2 +# CHECK-NEXT: 3. 3 0.0 0.0 0.0 vmovapd %xmm2, %xmm3 +# CHECK-NEXT: 4. 3 0.0 0.0 0.0 vmovupd %xmm3, %xmm4 +# CHECK-NEXT: 5. 3 0.0 0.0 0.0 vmovdqa %xmm4, %xmm5 +# CHECK-NEXT: 6. 3 0.0 0.0 0.0 vmovdqu %xmm5, %xmm0 diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-4.s b/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-4.s index 72ca7693c5f..223b4c2c239 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-4.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-4.s @@ -9,12 +9,12 @@ mov %edx, %eax # CHECK: Iterations: 3 # CHECK-NEXT: Instructions: 15 -# CHECK-NEXT: Total Cycles: 12 +# CHECK-NEXT: Total Cycles: 9 # CHECK-NEXT: Total uOps: 15 # CHECK: Dispatch Width: 2 -# CHECK-NEXT: uOps Per Cycle: 1.25 -# CHECK-NEXT: IPC: 1.25 +# CHECK-NEXT: uOps Per Cycle: 1.67 +# CHECK-NEXT: IPC: 1.67 # CHECK-NEXT: Block RThroughput: 2.5 # CHECK: Instruction Info: @@ -33,8 +33,8 @@ mov %edx, %eax # CHECK-NEXT: 1 1 0.50 movl %edx, %eax # CHECK: Register File statistics: -# CHECK-NEXT: Total number of mappings created: 12 -# CHECK-NEXT: Max number of mappings used: 7 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: * Register File #1 -- JFpuPRF: # CHECK-NEXT: Number of physical registers: 72 @@ -43,8 +43,8 @@ mov %edx, %eax # CHECK: * Register File #2 -- JIntegerPRF: # CHECK-NEXT: Number of physical registers: 64 -# CHECK-NEXT: Total number of mappings created: 12 -# CHECK-NEXT: Max number of mappings used: 7 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: Resources: # CHECK-NEXT: [0] - JALU0 @@ -64,35 +64,34 @@ mov %edx, %eax # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] -# CHECK-NEXT: 2.00 2.00 - - - - - - - - - - - - +# CHECK-NEXT: - - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions: # CHECK-NEXT: - - - - - - - - - - - - - - xorl %eax, %eax -# CHECK-NEXT: 0.33 0.67 - - - - - - - - - - - - movl %eax, %ebx -# CHECK-NEXT: 1.00 - - - - - - - - - - - - - movl %ebx, %ecx -# CHECK-NEXT: - 1.00 - - - - - - - - - - - - movl %ecx, %edx -# CHECK-NEXT: 0.67 0.33 - - - - - - - - - - - - movl %edx, %eax +# CHECK-NEXT: - - - - - - - - - - - - - - movl %eax, %ebx +# CHECK-NEXT: - - - - - - - - - - - - - - movl %ebx, %ecx +# CHECK-NEXT: - - - - - - - - - - - - - - movl %ecx, %edx +# CHECK-NEXT: - - - - - - - - - - - - - - movl %edx, %eax # CHECK: Timeline view: -# CHECK-NEXT: 01 -# CHECK-NEXT: Index 0123456789 +# CHECK-NEXT: Index 012345678 -# CHECK: [0,0] DR . .. xorl %eax, %eax -# CHECK-NEXT: [0,1] DeER . .. movl %eax, %ebx -# CHECK-NEXT: [0,2] .DeER. .. movl %ebx, %ecx -# CHECK-NEXT: [0,3] .D=eER .. movl %ecx, %edx -# CHECK-NEXT: [0,4] . D=eER .. movl %edx, %eax -# CHECK-NEXT: [1,0] . D---R .. xorl %eax, %eax -# CHECK-NEXT: [1,1] . DeE-R .. movl %eax, %ebx -# CHECK-NEXT: [1,2] . D=eER .. movl %ebx, %ecx -# CHECK-NEXT: [1,3] . D=eER .. movl %ecx, %edx -# CHECK-NEXT: [1,4] . D==eER.. movl %edx, %eax -# CHECK-NEXT: [2,0] . D---R.. xorl %eax, %eax -# CHECK-NEXT: [2,1] . DeE--R. movl %eax, %ebx -# CHECK-NEXT: [2,2] . .DeE-R. movl %ebx, %ecx -# CHECK-NEXT: [2,3] . .D=eE-R movl %ecx, %edx -# CHECK-NEXT: [2,4] . . D=eER movl %edx, %eax +# CHECK: [0,0] DR . . xorl %eax, %eax +# CHECK-NEXT: [0,1] DR . . movl %eax, %ebx +# CHECK-NEXT: [0,2] .DR . . movl %ebx, %ecx +# CHECK-NEXT: [0,3] .DR . . movl %ecx, %edx +# CHECK-NEXT: [0,4] . DR . . movl %edx, %eax +# CHECK-NEXT: [1,0] . DR . . xorl %eax, %eax +# CHECK-NEXT: [1,1] . DR. . movl %eax, %ebx +# CHECK-NEXT: [1,2] . DR. . movl %ebx, %ecx +# CHECK-NEXT: [1,3] . DR . movl %ecx, %edx +# CHECK-NEXT: [1,4] . DR . movl %edx, %eax +# CHECK-NEXT: [2,0] . DR . xorl %eax, %eax +# CHECK-NEXT: [2,1] . DR . movl %eax, %ebx +# CHECK-NEXT: [2,2] . .DR. movl %ebx, %ecx +# CHECK-NEXT: [2,3] . .DR. movl %ecx, %edx +# CHECK-NEXT: [2,4] . . DR movl %edx, %eax # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -101,8 +100,8 @@ mov %edx, %eax # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 0.0 0.0 2.0 xorl %eax, %eax -# CHECK-NEXT: 1. 3 1.0 1.0 1.0 movl %eax, %ebx -# CHECK-NEXT: 2. 3 1.3 0.0 0.3 movl %ebx, %ecx -# CHECK-NEXT: 3. 3 2.0 0.0 0.3 movl %ecx, %edx -# CHECK-NEXT: 4. 3 2.3 0.0 0.0 movl %edx, %eax +# CHECK-NEXT: 0. 3 0.0 0.0 0.0 xorl %eax, %eax +# CHECK-NEXT: 1. 3 0.0 0.0 0.0 movl %eax, %ebx +# CHECK-NEXT: 2. 3 0.0 0.0 0.0 movl %ebx, %ecx +# CHECK-NEXT: 3. 3 0.0 0.0 0.0 movl %ecx, %edx +# CHECK-NEXT: 4. 3 0.0 0.0 0.0 movl %edx, %eax diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-5.s b/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-5.s index 7d6b75f7c3f..ab873c7c43f 100644 --- a/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-5.s +++ b/llvm/test/tools/llvm-mca/X86/BtVer2/reg-move-elimination-5.s @@ -9,12 +9,12 @@ mov %rdx, %rax # CHECK: Iterations: 3 # CHECK-NEXT: Instructions: 15 -# CHECK-NEXT: Total Cycles: 12 +# CHECK-NEXT: Total Cycles: 9 # CHECK-NEXT: Total uOps: 15 # CHECK: Dispatch Width: 2 -# CHECK-NEXT: uOps Per Cycle: 1.25 -# CHECK-NEXT: IPC: 1.25 +# CHECK-NEXT: uOps Per Cycle: 1.67 +# CHECK-NEXT: IPC: 1.67 # CHECK-NEXT: Block RThroughput: 2.5 # CHECK: Instruction Info: @@ -33,8 +33,8 @@ mov %rdx, %rax # CHECK-NEXT: 1 1 0.50 movq %rdx, %rax # CHECK: Register File statistics: -# CHECK-NEXT: Total number of mappings created: 12 -# CHECK-NEXT: Max number of mappings used: 7 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: * Register File #1 -- JFpuPRF: # CHECK-NEXT: Number of physical registers: 72 @@ -43,8 +43,8 @@ mov %rdx, %rax # CHECK: * Register File #2 -- JIntegerPRF: # CHECK-NEXT: Number of physical registers: 64 -# CHECK-NEXT: Total number of mappings created: 12 -# CHECK-NEXT: Max number of mappings used: 7 +# CHECK-NEXT: Total number of mappings created: 0 +# CHECK-NEXT: Max number of mappings used: 0 # CHECK: Resources: # CHECK-NEXT: [0] - JALU0 @@ -64,35 +64,34 @@ mov %rdx, %rax # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] -# CHECK-NEXT: 2.00 2.00 - - - - - - - - - - - - +# CHECK-NEXT: - - - - - - - - - - - - - - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] Instructions: # CHECK-NEXT: - - - - - - - - - - - - - - xorq %rax, %rax -# CHECK-NEXT: 0.33 0.67 - - - - - - - - - - - - movq %rax, %rbx -# CHECK-NEXT: 1.00 - - - - - - - - - - - - - movq %rbx, %rcx -# CHECK-NEXT: - 1.00 - - - - - - - - - - - - movq %rcx, %rdx -# CHECK-NEXT: 0.67 0.33 - - - - - - - - - - - - movq %rdx, %rax +# CHECK-NEXT: - - - - - - - - - - - - - - movq %rax, %rbx +# CHECK-NEXT: - - - - - - - - - - - - - - movq %rbx, %rcx +# CHECK-NEXT: - - - - - - - - - - - - - - movq %rcx, %rdx +# CHECK-NEXT: - - - - - - - - - - - - - - movq %rdx, %rax # CHECK: Timeline view: -# CHECK-NEXT: 01 -# CHECK-NEXT: Index 0123456789 +# CHECK-NEXT: Index 012345678 -# CHECK: [0,0] DR . .. xorq %rax, %rax -# CHECK-NEXT: [0,1] DeER . .. movq %rax, %rbx -# CHECK-NEXT: [0,2] .DeER. .. movq %rbx, %rcx -# CHECK-NEXT: [0,3] .D=eER .. movq %rcx, %rdx -# CHECK-NEXT: [0,4] . D=eER .. movq %rdx, %rax -# CHECK-NEXT: [1,0] . D---R .. xorq %rax, %rax -# CHECK-NEXT: [1,1] . DeE-R .. movq %rax, %rbx -# CHECK-NEXT: [1,2] . D=eER .. movq %rbx, %rcx -# CHECK-NEXT: [1,3] . D=eER .. movq %rcx, %rdx -# CHECK-NEXT: [1,4] . D==eER.. movq %rdx, %rax -# CHECK-NEXT: [2,0] . D---R.. xorq %rax, %rax -# CHECK-NEXT: [2,1] . DeE--R. movq %rax, %rbx -# CHECK-NEXT: [2,2] . .DeE-R. movq %rbx, %rcx -# CHECK-NEXT: [2,3] . .D=eE-R movq %rcx, %rdx -# CHECK-NEXT: [2,4] . . D=eER movq %rdx, %rax +# CHECK: [0,0] DR . . xorq %rax, %rax +# CHECK-NEXT: [0,1] DR . . movq %rax, %rbx +# CHECK-NEXT: [0,2] .DR . . movq %rbx, %rcx +# CHECK-NEXT: [0,3] .DR . . movq %rcx, %rdx +# CHECK-NEXT: [0,4] . DR . . movq %rdx, %rax +# CHECK-NEXT: [1,0] . DR . . xorq %rax, %rax +# CHECK-NEXT: [1,1] . DR. . movq %rax, %rbx +# CHECK-NEXT: [1,2] . DR. . movq %rbx, %rcx +# CHECK-NEXT: [1,3] . DR . movq %rcx, %rdx +# CHECK-NEXT: [1,4] . DR . movq %rdx, %rax +# CHECK-NEXT: [2,0] . DR . xorq %rax, %rax +# CHECK-NEXT: [2,1] . DR . movq %rax, %rbx +# CHECK-NEXT: [2,2] . .DR. movq %rbx, %rcx +# CHECK-NEXT: [2,3] . .DR. movq %rcx, %rdx +# CHECK-NEXT: [2,4] . . DR movq %rdx, %rax # CHECK: Average Wait times (based on the timeline view): # CHECK-NEXT: [0]: Executions @@ -101,8 +100,8 @@ mov %rdx, %rax # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage # CHECK: [0] [1] [2] [3] -# CHECK-NEXT: 0. 3 0.0 0.0 2.0 xorq %rax, %rax -# CHECK-NEXT: 1. 3 1.0 1.0 1.0 movq %rax, %rbx -# CHECK-NEXT: 2. 3 1.3 0.0 0.3 movq %rbx, %rcx -# CHECK-NEXT: 3. 3 2.0 0.0 0.3 movq %rcx, %rdx -# CHECK-NEXT: 4. 3 2.3 0.0 0.0 movq %rdx, %rax +# CHECK-NEXT: 0. 3 0.0 0.0 0.0 xorq %rax, %rax +# CHECK-NEXT: 1. 3 0.0 0.0 0.0 movq %rax, %rbx +# CHECK-NEXT: 2. 3 0.0 0.0 0.0 movq %rbx, %rcx +# CHECK-NEXT: 3. 3 0.0 0.0 0.0 movq %rcx, %rdx +# CHECK-NEXT: 4. 3 0.0 0.0 0.0 movq %rdx, %rax |

