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| author | Craig Topper <craig.topper@intel.com> | 2018-01-17 18:58:22 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-17 18:58:22 +0000 |
| commit | b70ca5060fea321748e1b40e9165ad410c4f12ae (patch) | |
| tree | a6b094d1f02583e5578ec5109bb064ef35019c13 /llvm/test/tools/llvm-readobj/program-headers.test | |
| parent | a14a1f923f45381ba96acd5246506b470ae7b23c (diff) | |
| download | bcm5719-llvm-b70ca5060fea321748e1b40e9165ad410c4f12ae.tar.gz bcm5719-llvm-b70ca5060fea321748e1b40e9165ad410c4f12ae.zip | |
[X86] Teach LowerBUILD_VECTOR to recognize pair-wise splats of 32-bit elements and use a 64-bit broadcast
If we are splatting pairs of 32-bit elements, we can use a 64-bit broadcast to get the job done.
We could probably could probably do this with other sizes too, for example four 16-bit elements. Or we could broadcast pairs of 16-bit elements using a 32-bit element broadcast. But I've left that as a future improvement.
I've also restricted this to AVX2 only because we can only broadcast loads under AVX.
Differential Revision: https://reviews.llvm.org/D42086
llvm-svn: 322730
Diffstat (limited to 'llvm/test/tools/llvm-readobj/program-headers.test')
0 files changed, 0 insertions, 0 deletions
