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| author | Igor Kudrin <ikudrin@accesssoftek.com> | 2019-02-26 12:15:14 +0000 |
|---|---|---|
| committer | Igor Kudrin <ikudrin@accesssoftek.com> | 2019-02-26 12:15:14 +0000 |
| commit | 2d3faad706c81814abc5e4080df38c4bccde1d48 (patch) | |
| tree | 9a11b749881378558b3eabd238ac516e787b8b01 /llvm/test/tools/llvm-objdump | |
| parent | e42be1eae230d0ff3f650fcea7826da4842e7371 (diff) | |
| download | bcm5719-llvm-2d3faad706c81814abc5e4080df38c4bccde1d48.tar.gz bcm5719-llvm-2d3faad706c81814abc5e4080df38c4bccde1d48.zip | |
[llvm-objdump] Implement -Mreg-names-raw/-std options.
The --disassembler-options, or -M, are used to customize
the disassembler and affect its output.
The two implemented options allow selecting register names on ARM:
* With -Mreg-names-raw, the disassembler uses rNN for all registers.
* With -Mreg-names-std it prints sp, lr and pc for r13, r14 and r15,
which is the default behavior of llvm-objdump.
Differential Revision: https://reviews.llvm.org/D57680
llvm-svn: 354870
Diffstat (limited to 'llvm/test/tools/llvm-objdump')
| -rw-r--r-- | llvm/test/tools/llvm-objdump/ARM/reg-names.s | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/tools/llvm-objdump/ARM/reg-names.s b/llvm/test/tools/llvm-objdump/ARM/reg-names.s new file mode 100644 index 00000000000..51f3dc337d3 --- /dev/null +++ b/llvm/test/tools/llvm-objdump/ARM/reg-names.s @@ -0,0 +1,18 @@ +@ RUN: llvm-mc %s -triple armv5-unknown-linux -filetype=obj -o %t +@ RUN: llvm-objdump -d %t | FileCheck -check-prefix=STD %s +@ RUN: llvm-objdump -d -Mreg-names-std %t \ +@ RUN: | FileCheck -check-prefix=STD %s +@ RUN: llvm-objdump -d --disassembler-options=reg-names-raw %t \ +@ RUN: | FileCheck -check-prefix=RAW %s +@ RUN: llvm-objdump -d -Mreg-names-raw,reg-names-std %t \ +@ RUN: | FileCheck -check-prefix=STD %s +@ RUN: llvm-objdump -d -Mreg-names-std,reg-names-raw %t \ +@ RUN: | FileCheck -check-prefix=RAW %s +@ RUN: not llvm-objdump -d -Munknown %t 2>&1 \ +@ RUN: | FileCheck -check-prefix=ERR %s +@ ERR: Unrecognized disassembler option: unknown + +.text + add r13, r14, r15 +@ STD: add sp, lr, pc +@ RAW: add r13, r14, r15 |
