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| author | QingShan Zhang <qshanz@cn.ibm.com> | 2019-11-22 08:55:13 +0000 |
|---|---|---|
| committer | QingShan Zhang <qshanz@cn.ibm.com> | 2019-11-22 08:58:27 +0000 |
| commit | a4cc895aee3b37e196f779883c8398a6cdd7ff68 (patch) | |
| tree | cf1e18ec26fc268b249e6fcb366c38376f7e2c60 /llvm/test/tools/llvm-dwarfdump/X86 | |
| parent | 3b901ce36755bf67c62d9ba5866ad9e0ab9f546d (diff) | |
| download | bcm5719-llvm-a4cc895aee3b37e196f779883c8398a6cdd7ff68.tar.gz bcm5719-llvm-a4cc895aee3b37e196f779883c8398a6cdd7ff68.zip | |
[PowerPC] Implement the vector extend sign instruction pattern match
Power9 has instructions to implement the semantics of SIGN_EXTEND_INREG for vector type.
Mark it as legal and add the match pattern.
Differential Revision: https://reviews.llvm.org/D69601
Diffstat (limited to 'llvm/test/tools/llvm-dwarfdump/X86')
0 files changed, 0 insertions, 0 deletions
