diff options
| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-06-13 16:31:51 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-06-13 16:31:51 +0000 |
| commit | 2bda177da01cbbb73bcd991e87c060627b3ad2ab (patch) | |
| tree | c766d00e080576d6c3908130e636c3351e06063e /llvm/test/Verifier | |
| parent | aeb89f8b33d8fca4e819ba41267093699a7e4885 (diff) | |
| download | bcm5719-llvm-2bda177da01cbbb73bcd991e87c060627b3ad2ab.tar.gz bcm5719-llvm-2bda177da01cbbb73bcd991e87c060627b3ad2ab.zip | |
[AMDGPU] ImmArg and SourceOfDivergence for permlane/dpp
Added missing ImmArg and SourceOfDivergence to the crosslane
intrinsics.
Differential Revision: https://reviews.llvm.org/D63216
llvm-svn: 363276
Diffstat (limited to 'llvm/test/Verifier')
| -rw-r--r-- | llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll b/llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll index 5b0e5b3aad7..1940ce3833a 100644 --- a/llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll +++ b/llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll @@ -550,3 +550,31 @@ define i32 @test_udot4(i32 %arg0, i32 %arg1, i32 %arg2, i1 %arg3) { %val = call i32 @llvm.amdgcn.udot4(i32 %arg0, i32 %arg1, i32 %arg2, i1 %arg3) ret i32 %val } + +declare i32 @llvm.amdgcn.permlane16(i32, i32, i32, i32, i1, i1) +define i32 @test_permlane16(i32 addrspace(1)* %out, i32 %arg0, i32 %arg1, i32 %arg2, i1 %arg3, i1 %arg4) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i1 %arg3 + ; CHECK-NEXT: %v1 = call i32 @llvm.amdgcn.permlane16(i32 %arg0, i32 %arg0, i32 %arg1, i32 %arg2, i1 %arg3, i1 false) + %v1 = call i32 @llvm.amdgcn.permlane16(i32 %arg0, i32 %arg0, i32 %arg1, i32 %arg2, i1 %arg3, i1 false) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i1 %arg4 + ; CHECK-NEXT: call i32 @llvm.amdgcn.permlane16(i32 %v2, i32 %arg0, i32 %arg1, i32 %arg2, i1 false, i1 %arg4) + %v2 = call i32 @llvm.amdgcn.permlane16(i32 %v2, i32 %arg0, i32 %arg1, i32 %arg2, i1 false, i1 %arg4) + ret i32 %v2 +} + +declare i32 @llvm.amdgcn.permlanex16(i32, i32, i32, i32, i1, i1) +define i32 @test_permlanex16(i32 addrspace(1)* %out, i32 %arg0, i32 %arg1, i32 %arg2, i1 %arg3, i1 %arg4) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i1 %arg3 + ; CHECK-NEXT: %v1 = call i32 @llvm.amdgcn.permlanex16(i32 %arg0, i32 %arg0, i32 %arg1, i32 %arg2, i1 %arg3, i1 false) + %v1 = call i32 @llvm.amdgcn.permlanex16(i32 %arg0, i32 %arg0, i32 %arg1, i32 %arg2, i1 %arg3, i1 false) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i1 %arg4 + ; CHECK-NEXT: call i32 @llvm.amdgcn.permlanex16(i32 %v2, i32 %arg0, i32 %arg1, i32 %arg2, i1 false, i1 %arg4) + %v2 = call i32 @llvm.amdgcn.permlanex16(i32 %v2, i32 %arg0, i32 %arg1, i32 %arg2, i1 false, i1 %arg4) + ret i32 %v2 +} |
