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| author | Sanjay Patel <spatel@rotateright.com> | 2016-09-12 15:51:42 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-09-12 15:51:42 +0000 |
| commit | db400baa80307ebcd07b6c6e4095f3cb2f5ab41d (patch) | |
| tree | 75e5779051633908739732f407dbcd034a7e5860 /llvm/test/Transforms | |
| parent | a3e36da6f2e874ea3d5c89f2386fa012ad4733d0 (diff) | |
| download | bcm5719-llvm-db400baa80307ebcd07b6c6e4095f3cb2f5ab41d.tar.gz bcm5719-llvm-db400baa80307ebcd07b6c6e4095f3cb2f5ab41d.zip | |
[InstCombine] add tests to show missing vector folds
llvm-svn: 281219
Diffstat (limited to 'llvm/test/Transforms')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/exact.ll | 18 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/shift.ll | 12 |
2 files changed, 29 insertions, 1 deletions
diff --git a/llvm/test/Transforms/InstCombine/exact.ll b/llvm/test/Transforms/InstCombine/exact.ll index 3d1e1e4e299..070dfd3c88e 100644 --- a/llvm/test/Transforms/InstCombine/exact.ll +++ b/llvm/test/Transforms/InstCombine/exact.ll @@ -132,7 +132,7 @@ define <2 x i1> @ashr_icmp2_vec(<2 x i64> %X) { ; PR9998 ; Make sure we don't transform the ashr here into an sdiv -define i1 @pr9998(i32 %V) nounwind { +define i1 @pr9998(i32 %V) { ; CHECK-LABEL: @pr9998( ; CHECK-NEXT: [[W_MASK:%.*]] = and i32 %V, 1 ; CHECK-NEXT: [[Z:%.*]] = icmp ne i32 [[W_MASK]], 0 @@ -145,6 +145,22 @@ define i1 @pr9998(i32 %V) nounwind { ret i1 %Z } +; FIXME: Vectors should fold the same way. +define <2 x i1> @pr9998vec(<2 x i32> %V) { +; CHECK-LABEL: @pr9998vec( +; CHECK-NEXT: [[W:%.*]] = shl <2 x i32> %V, <i32 31, i32 31> +; CHECK-NEXT: [[X:%.*]] = ashr exact <2 x i32> [[W]], <i32 31, i32 31> +; CHECK-NEXT: [[Y:%.*]] = sext <2 x i32> [[X]] to <2 x i64> +; CHECK-NEXT: [[Z:%.*]] = icmp ugt <2 x i64> [[Y]], <i64 7297771788697658747, i64 7297771788697658747> +; CHECK-NEXT: ret <2 x i1> [[Z]] +; + %W = shl <2 x i32> %V, <i32 31, i32 31> + %X = ashr exact <2 x i32> %W, <i32 31, i32 31> + %Y = sext <2 x i32> %X to <2 x i64> + %Z = icmp ugt <2 x i64> %Y, <i64 7297771788697658747, i64 7297771788697658747> + ret <2 x i1> %Z +} + define i1 @udiv_icmp1(i64 %X) { ; CHECK-LABEL: @udiv_icmp1( ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 %X, 0 diff --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll index 462950671e3..12ab3535d4a 100644 --- a/llvm/test/Transforms/InstCombine/shift.ll +++ b/llvm/test/Transforms/InstCombine/shift.ll @@ -628,6 +628,18 @@ define i1 @test35(i32 %X) { ret i1 %tmp2 } +; FIXME: Vectors should fold the same way. +define <2 x i1> @test35vec(<2 x i32> %X) { +; CHECK-LABEL: @test35vec( +; CHECK-NEXT: [[TMP1:%.*]] = ashr <2 x i32> %X, <i32 7, i32 7> +; CHECK-NEXT: [[TMP2:%.*]] = icmp slt <2 x i32> [[TMP1]], zeroinitializer +; CHECK-NEXT: ret <2 x i1> [[TMP2]] +; + %tmp1 = ashr <2 x i32> %X, <i32 7, i32 7> + %tmp2 = icmp slt <2 x i32> %tmp1, zeroinitializer + ret <2 x i1> %tmp2 +} + define i128 @test36(i128 %A, i128 %B) { ; CHECK-LABEL: @test36( ; CHECK-NEXT: entry: |
