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| author | Craig Topper <craig.topper@intel.com> | 2017-08-21 16:04:11 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-08-21 16:04:11 +0000 |
| commit | cc255bcd7720c77a931e239f13f72bae37a90e8d (patch) | |
| tree | ee9de25d93f3d5579b0996b356fce7caf47e819b /llvm/test/Transforms | |
| parent | 8078dd2984cd4ba5a634038bd7b2326795fe6b23 (diff) | |
| download | bcm5719-llvm-cc255bcd7720c77a931e239f13f72bae37a90e8d.tar.gz bcm5719-llvm-cc255bcd7720c77a931e239f13f72bae37a90e8d.zip | |
[InstCombine] Fix a weakness in canEvaluateZExtd around 'and' instructions
Summary:
If the bitsToClear from the LHS of an 'and' comes back non-zero, but all of those bits are known zero on the RHS, we can reset bitsToClear.
Without this, the 'or' in the modified test case blocks the transform because it has non-zero bits in its RHS in those bits.
Reviewers: spatel, majnemer, davide
Reviewed By: davide
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D36944
llvm-svn: 311343
Diffstat (limited to 'llvm/test/Transforms')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/cast.ll | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/llvm/test/Transforms/InstCombine/cast.ll b/llvm/test/Transforms/InstCombine/cast.ll index 364337b9693..a9f51435dbe 100644 --- a/llvm/test/Transforms/InstCombine/cast.ll +++ b/llvm/test/Transforms/InstCombine/cast.ll @@ -1588,15 +1588,12 @@ define i64 @test94(i32 %a) { } ; We should be able to remove the zext and trunc here. -; TODO: This is currently blocked because we don't realize the 'and' has cleared the extra bits that would be shifted in widening the lshr. define i32 @test95(i32 %x) { ; CHECK-LABEL: @test95( -; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[X:%.*]] to i8 -; CHECK-NEXT: [[TMP2:%.*]] = lshr i8 [[TMP1]], 6 -; CHECK-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 2 -; CHECK-NEXT: [[TMP4:%.*]] = or i8 [[TMP3]], 40 -; CHECK-NEXT: [[TMP5:%.*]] = zext i8 [[TMP4]] to i32 -; CHECK-NEXT: ret i32 [[TMP5]] +; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 6 +; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 2 +; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], 40 +; CHECK-NEXT: ret i32 [[TMP3]] ; %1 = trunc i32 %x to i8 %2 = lshr i8 %1, 6 |
