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| author | Sanjay Patel <spatel@rotateright.com> | 2017-11-16 14:40:51 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2017-11-16 14:40:51 +0000 |
| commit | b3fa94586f6f466fe3d7b7d2595b97c5efa3f9c2 (patch) | |
| tree | 0ab34875672d25cdc7b8d4ea479b89ee59831fbf /llvm/test/Transforms | |
| parent | 89bca9e56642a1631acfa7a874489a1a989927dc (diff) | |
| download | bcm5719-llvm-b3fa94586f6f466fe3d7b7d2595b97c5efa3f9c2.tar.gz bcm5719-llvm-b3fa94586f6f466fe3d7b7d2595b97c5efa3f9c2.zip | |
[InstCombine] include 'sub' in the list of narrow-able binops
// trunc (binop X, C) --> binop (trunc X, C')
// trunc (binop (ext X), Y) --> binop X, (trunc Y)
I'm grouping sub with the other binops because that makes the code simpler
and the transforms are valid:
https://rise4fun.com/Alive/UeF
...so even though we don't expect a sub with constant Op1 or any of the
other opcodes with constant Op0 due to canonicalization rules, we might as
well handle those situations if non-canonical code somehow reaches this
point (it should just make instcombine more efficient in reaching its
end goal).
This should solve the problem that later manifests in the vectorizers in
PR35295:
https://bugs.llvm.org/show_bug.cgi?id=35295
llvm-svn: 318404
Diffstat (limited to 'llvm/test/Transforms')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/trunc-binop-ext.ll | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/llvm/test/Transforms/InstCombine/trunc-binop-ext.ll b/llvm/test/Transforms/InstCombine/trunc-binop-ext.ll index c77be5f54e6..40d58f31458 100644 --- a/llvm/test/Transforms/InstCombine/trunc-binop-ext.ll +++ b/llvm/test/Transforms/InstCombine/trunc-binop-ext.ll @@ -98,9 +98,8 @@ define i16 @narrow_zext_add(i16 %x16, i32 %y32) { define i16 @narrow_sext_sub(i16 %x16, i32 %y32) { ; CHECK-LABEL: @narrow_sext_sub( -; CHECK-NEXT: [[X321:%.*]] = zext i16 %x16 to i32 -; CHECK-NEXT: [[B:%.*]] = sub i32 [[X321]], %y32 -; CHECK-NEXT: [[R:%.*]] = trunc i32 [[B]] to i16 +; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16 +; CHECK-NEXT: [[R:%.*]] = sub i16 %x16, [[TMP1]] ; CHECK-NEXT: ret i16 [[R]] ; %x32 = sext i16 %x16 to i32 @@ -111,9 +110,8 @@ define i16 @narrow_sext_sub(i16 %x16, i32 %y32) { define i16 @narrow_zext_sub(i16 %x16, i32 %y32) { ; CHECK-LABEL: @narrow_zext_sub( -; CHECK-NEXT: [[X32:%.*]] = zext i16 %x16 to i32 -; CHECK-NEXT: [[B:%.*]] = sub i32 [[X32]], %y32 -; CHECK-NEXT: [[R:%.*]] = trunc i32 [[B]] to i16 +; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %y32 to i16 +; CHECK-NEXT: [[R:%.*]] = sub i16 %x16, [[TMP1]] ; CHECK-NEXT: ret i16 [[R]] ; %x32 = zext i16 %x16 to i32 @@ -264,9 +262,8 @@ define <2 x i16> @narrow_zext_add_commute(<2 x i16> %x16, <2 x i32> %y32) { define <2 x i16> @narrow_sext_sub_commute(<2 x i16> %x16, <2 x i32> %y32) { ; CHECK-LABEL: @narrow_sext_sub_commute( ; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17> -; CHECK-NEXT: [[X321:%.*]] = zext <2 x i16> %x16 to <2 x i32> -; CHECK-NEXT: [[B:%.*]] = sub <2 x i32> [[Y32OP0]], [[X321]] -; CHECK-NEXT: [[R:%.*]] = trunc <2 x i32> [[B]] to <2 x i16> +; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16> +; CHECK-NEXT: [[R:%.*]] = sub <2 x i16> [[TMP1]], %x16 ; CHECK-NEXT: ret <2 x i16> [[R]] ; %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17> @@ -279,9 +276,8 @@ define <2 x i16> @narrow_sext_sub_commute(<2 x i16> %x16, <2 x i32> %y32) { define <2 x i16> @narrow_zext_sub_commute(<2 x i16> %x16, <2 x i32> %y32) { ; CHECK-LABEL: @narrow_zext_sub_commute( ; CHECK-NEXT: [[Y32OP0:%.*]] = sdiv <2 x i32> %y32, <i32 7, i32 -17> -; CHECK-NEXT: [[X32:%.*]] = zext <2 x i16> %x16 to <2 x i32> -; CHECK-NEXT: [[B:%.*]] = sub <2 x i32> [[Y32OP0]], [[X32]] -; CHECK-NEXT: [[R:%.*]] = trunc <2 x i32> [[B]] to <2 x i16> +; CHECK-NEXT: [[TMP1:%.*]] = trunc <2 x i32> [[Y32OP0]] to <2 x i16> +; CHECK-NEXT: [[R:%.*]] = sub <2 x i16> [[TMP1]], %x16 ; CHECK-NEXT: ret <2 x i16> [[R]] ; %y32op0 = sdiv <2 x i32> %y32, <i32 7, i32 -17> |
