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| author | Dinesh Dwivedi <dinesh.d@samsung.com> | 2014-06-26 05:40:22 +0000 |
|---|---|---|
| committer | Dinesh Dwivedi <dinesh.d@samsung.com> | 2014-06-26 05:40:22 +0000 |
| commit | a71617358107489c633c1207fefbb1ed0e514333 (patch) | |
| tree | 13719e68356bb7c101ff6a9216f2e0e9466ed775 /llvm/test/Transforms | |
| parent | 7e0daca11003e601770dc6cf2a82e3192e773915 (diff) | |
| download | bcm5719-llvm-a71617358107489c633c1207fefbb1ed0e514333.tar.gz bcm5719-llvm-a71617358107489c633c1207fefbb1ed0e514333.zip | |
Added instruction combine to transform few more negative values addition to subtraction (Part 2)
This patch enables transforms for
(x + (~(y | c) + 1) --> x - (y | c) if c is even
Differential Revision: http://reviews.llvm.org/D4209
llvm-svn: 211765
Diffstat (limited to 'llvm/test/Transforms')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/add2.ll | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/add2.ll b/llvm/test/Transforms/InstCombine/add2.ll index 821fce0dabc..1737b258971 100644 --- a/llvm/test/Transforms/InstCombine/add2.ll +++ b/llvm/test/Transforms/InstCombine/add2.ll @@ -150,6 +150,32 @@ define i32 @test14(i32 %x, i32 %y) { ; CHECK-NEXT: ret i32 [[SUB]] } +define i32 @test15(i32 %x, i32 %y) { + %x.not = and i32 %x, -1431655767 + %neg = xor i32 %x.not, -1431655767 + %add = add i32 %y, 1 + %add1 = add i32 %add, %neg + ret i32 %add1 +; CHECK-LABEL: @test15( +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 %x, 1431655766 +; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[OR]] +; CHECK-NEXT: ret i32 [[SUB]] +} + +define i32 @test16(i32 %x, i32 %y) { + %shr = ashr i32 %x, 3 + %shr.not = and i32 %shr, -1431655767 + %neg = xor i32 %shr.not, -1431655767 + %add = add i32 %y, 1 + %add1 = add i32 %add, %neg + ret i32 %add1 +; CHECK-LABEL: @test16( +; CHECK-NEXT: [[SHR:%[a-z0-9]+]] = ashr i32 %x, 3 +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[SHR]], 1431655766 +; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = sub i32 %y, [[OR]] +; CHECK-NEXT: ret i32 [[SUB]] +} + define i16 @add_nsw_mul_nsw(i16 %x) { %add1 = add nsw i16 %x, %x %add2 = add nsw i16 %add1, %x |
