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| author | Amjad Aboud <amjad.aboud@intel.com> | 2017-08-16 22:42:38 +0000 |
|---|---|---|
| committer | Amjad Aboud <amjad.aboud@intel.com> | 2017-08-16 22:42:38 +0000 |
| commit | 86111c6696e3411363cd12697e837ca46ca5a2e2 (patch) | |
| tree | 789b09e59ee7470535377b86f6e4ac31433ae35a /llvm/test/Transforms | |
| parent | cbcffb173c25a294fb21ba0c77ff5e68a004601e (diff) | |
| download | bcm5719-llvm-86111c6696e3411363cd12697e837ca46ca5a2e2.tar.gz bcm5719-llvm-86111c6696e3411363cd12697e837ca46ca5a2e2.zip | |
[InstCombine] Teach canEvaluateTruncated to handle arithmetic shift (including those with vector splat shift amount)
Differential Revision: https://reviews.llvm.org/D36784
llvm-svn: 311050
Diffstat (limited to 'llvm/test/Transforms')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/trunc.ll | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/trunc.ll b/llvm/test/Transforms/InstCombine/trunc.ll index 6d0e0ac5cca..40956d3ff8c 100644 --- a/llvm/test/Transforms/InstCombine/trunc.ll +++ b/llvm/test/Transforms/InstCombine/trunc.ll @@ -89,6 +89,32 @@ define i32 @test6(i64 %A) { ret i32 %D } +define i32 @trunc_ashr(i32 %X) { +; CHECK-LABEL: @trunc_ashr( +; CHECK-NEXT: [[B:%.*]] = or i32 [[X:%.*]], -2147483648 +; CHECK-NEXT: [[C:%.*]] = ashr i32 [[B]], 8 +; CHECK-NEXT: ret i32 [[C]] +; + %A = zext i32 %X to i36 + %B = or i36 %A, -2147483648 ; 0xF80000000 + %C = ashr i36 %B, 8 + %T = trunc i36 %C to i32 + ret i32 %T +} + +define <2 x i32> @trunc_ashr_vec(<2 x i32> %X) { +; CHECK-LABEL: @trunc_ashr_vec( +; CHECK-NEXT: [[B:%.*]] = or <2 x i32> [[X:%.*]], <i32 -2147483648, i32 -2147483648> +; CHECK-NEXT: [[C:%.*]] = ashr <2 x i32> [[B]], <i32 8, i32 8> +; CHECK-NEXT: ret <2 x i32> [[C]] +; + %A = zext <2 x i32> %X to <2 x i36> + %B = or <2 x i36> %A, <i36 -2147483648, i36 -2147483648> ; 0xF80000000 + %C = ashr <2 x i36> %B, <i36 8, i36 8> + %T = trunc <2 x i36> %C to <2 x i32> + ret <2 x i32> %T +} + define i92 @test7(i64 %A) { ; CHECK-LABEL: @test7( ; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 %A, 32 |
