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authorSanjay Patel <spatel@rotateright.com>2017-05-09 16:24:59 +0000
committerSanjay Patel <spatel@rotateright.com>2017-05-09 16:24:59 +0000
commit6844e21f593467c640f0e14e2113bf0dfb32b1a8 (patch)
treea0bc16140ba56e87ca046528176741727e044666 /llvm/test/Transforms
parent125c03070edbe7ee8b4f66879a08dc80cd280584 (diff)
downloadbcm5719-llvm-6844e21f593467c640f0e14e2113bf0dfb32b1a8.tar.gz
bcm5719-llvm-6844e21f593467c640f0e14e2113bf0dfb32b1a8.zip
[InstCombineCasts] Fix checks in sext->lshr->trunc pattern.
The comment says to avoid the case where zero bits are shifted into the truncated value, but the code checks that the shift is smaller than the truncated value instead of the number of bits added by the sign extension. Fixing this allows a shift by more than the value size to be introduced, which is undefined behavior, so the shift is capped at the value size minus one, which has the expected behavior of filling the value with the sign bit. Patch by Jacob Young! Differential Revision: https://reviews.llvm.org/D32285 llvm-svn: 302548
Diffstat (limited to 'llvm/test/Transforms')
-rw-r--r--llvm/test/Transforms/InstCombine/cast.ll12
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/Transforms/InstCombine/cast.ll b/llvm/test/Transforms/InstCombine/cast.ll
index 0a1f73e7dec..a4375a5cd57 100644
--- a/llvm/test/Transforms/InstCombine/cast.ll
+++ b/llvm/test/Transforms/InstCombine/cast.ll
@@ -1436,8 +1436,10 @@ define <2 x i32> @test90() {
; Do not optimize to ashr i64 (shift by 48 > 96 - 64)
define i64 @test91(i64 %A) {
; CHECK-LABEL: @test91(
-; CHECK-NEXT: [[C:%.*]] = ashr i64 %A, 48
-; CHECK-NEXT: ret i64 [[C]]
+; CHECK-NEXT: [[B:%.*]] = sext i64 %A to i96
+; CHECK-NEXT: [[C:%.*]] = lshr i96 [[B]], 48
+; CHECK-NEXT: [[D:%.*]] = trunc i96 [[C]] to i64
+; CHECK-NEXT: ret i64 [[D]]
;
%B = sext i64 %A to i96
%C = lshr i96 %B, 48
@@ -1460,10 +1462,8 @@ define i64 @test92(i64 %A) {
; When optimizing to ashr i32, don't shift by more than 31.
define i32 @test93(i32 %A) {
; CHECK-LABEL: @test93(
-; CHECK-NEXT: [[B:%.*]] = sext i32 %A to i96
-; CHECK-NEXT: [[C:%.*]] = lshr i96 [[B]], 64
-; CHECK-NEXT: [[D:%.*]] = trunc i96 [[C]] to i32
-; CHECK-NEXT: ret i32 [[D]]
+; CHECK-NEXT: [[C:%.*]] = ashr i32 %A, 31
+; CHECK-NEXT: ret i32 [[C]]
;
%B = sext i32 %A to i96
%C = lshr i96 %B, 64
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