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authorHans Wennborg <hans@hanshq.net>2015-08-31 21:10:35 +0000
committerHans Wennborg <hans@hanshq.net>2015-08-31 21:10:35 +0000
commit4a61370b8f68af510e3876db891a6ef578a17c60 (patch)
tree0573f1d21819d9f0f8fab526fb07ed59a39d0b5b /llvm/test/Transforms
parent21c1bc46aee2b69c2c48db8e961f0ce8394f21e1 (diff)
downloadbcm5719-llvm-4a61370b8f68af510e3876db891a6ef578a17c60.tar.gz
bcm5719-llvm-4a61370b8f68af510e3876db891a6ef578a17c60.zip
Fix CHECK directives that weren't checking.
llvm-svn: 246485
Diffstat (limited to 'llvm/test/Transforms')
-rw-r--r--llvm/test/Transforms/InstSimplify/shr-nop.ll12
-rw-r--r--llvm/test/Transforms/LICM/pr23608.ll2
-rw-r--r--llvm/test/Transforms/RewriteStatepointsForGC/codegen-cond.ll6
-rw-r--r--llvm/test/Transforms/SROA/basictest.ll2
-rw-r--r--llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll2
5 files changed, 12 insertions, 12 deletions
diff --git a/llvm/test/Transforms/InstSimplify/shr-nop.ll b/llvm/test/Transforms/InstSimplify/shr-nop.ll
index b0dc8731a11..edabcc314ea 100644
--- a/llvm/test/Transforms/InstSimplify/shr-nop.ll
+++ b/llvm/test/Transforms/InstSimplify/shr-nop.ll
@@ -244,7 +244,7 @@ define i1 @ashr_ne_opposite_msb(i8 %a) {
}
; CHECK-LABEL: @exact_ashr_eq_shift_gt
-; CHECK-NEXT : ret i1 false
+; CHECK-NEXT: ret i1 false
define i1 @exact_ashr_eq_shift_gt(i8 %a) {
%shr = ashr exact i8 -2, %a
%cmp = icmp eq i8 %shr, -8
@@ -252,7 +252,7 @@ define i1 @exact_ashr_eq_shift_gt(i8 %a) {
}
; CHECK-LABEL: @exact_ashr_ne_shift_gt
-; CHECK-NEXT : ret i1 true
+; CHECK-NEXT: ret i1 true
define i1 @exact_ashr_ne_shift_gt(i8 %a) {
%shr = ashr exact i8 -2, %a
%cmp = icmp ne i8 %shr, -8
@@ -260,7 +260,7 @@ define i1 @exact_ashr_ne_shift_gt(i8 %a) {
}
; CHECK-LABEL: @nonexact_ashr_eq_shift_gt
-; CHECK-NEXT : ret i1 false
+; CHECK-NEXT: ret i1 false
define i1 @nonexact_ashr_eq_shift_gt(i8 %a) {
%shr = ashr i8 -2, %a
%cmp = icmp eq i8 %shr, -8
@@ -268,7 +268,7 @@ define i1 @nonexact_ashr_eq_shift_gt(i8 %a) {
}
; CHECK-LABEL: @nonexact_ashr_ne_shift_gt
-; CHECK-NEXT : ret i1 true
+; CHECK-NEXT: ret i1 true
define i1 @nonexact_ashr_ne_shift_gt(i8 %a) {
%shr = ashr i8 -2, %a
%cmp = icmp ne i8 %shr, -8
@@ -292,7 +292,7 @@ define i1 @exact_lshr_ne_shift_gt(i8 %a) {
}
; CHECK-LABEL: @nonexact_lshr_eq_shift_gt
-; CHECK-NEXT : ret i1 false
+; CHECK-NEXT: ret i1 false
define i1 @nonexact_lshr_eq_shift_gt(i8 %a) {
%shr = lshr i8 2, %a
%cmp = icmp eq i8 %shr, 8
@@ -300,7 +300,7 @@ define i1 @nonexact_lshr_eq_shift_gt(i8 %a) {
}
; CHECK-LABEL: @nonexact_lshr_ne_shift_gt
-; CHECK-NEXT : ret i1 true
+; CHECK-NEXT: ret i1 true
define i1 @nonexact_lshr_ne_shift_gt(i8 %a) {
%shr = ashr i8 2, %a
%cmp = icmp ne i8 %shr, 8
diff --git a/llvm/test/Transforms/LICM/pr23608.ll b/llvm/test/Transforms/LICM/pr23608.ll
index 249bc6bf5f6..fe6fd1a1810 100644
--- a/llvm/test/Transforms/LICM/pr23608.ll
+++ b/llvm/test/Transforms/LICM/pr23608.ll
@@ -31,7 +31,7 @@ bb2: ; preds = %while.cond
br i1 %tobool, label %bb13, label %bb15
bb13: ; preds = %bb2
-; CHECK-LABEL bb13:
+; CHECK-LABEL: bb13:
; CHECK: %tmp8.le = inttoptr
%.lcssa7 = phi i32* [ %tmp8, %bb2 ]
call void @__msan_warning_noreturn()
diff --git a/llvm/test/Transforms/RewriteStatepointsForGC/codegen-cond.ll b/llvm/test/Transforms/RewriteStatepointsForGC/codegen-cond.ll
index 9698537280b..aedce03d255 100644
--- a/llvm/test/Transforms/RewriteStatepointsForGC/codegen-cond.ll
+++ b/llvm/test/Transforms/RewriteStatepointsForGC/codegen-cond.ll
@@ -13,7 +13,7 @@ continue:
; CHECK-LABEL: continue:
; CHECK: phi
; CHECK-DAG: [ %p.relocated, %safepoint ]
-; CHECK-DAG [ %p, %entry ]
+; CHECK-DAG: [ %p, %entry ]
; CHECK: %cond = icmp
; CHECK: br i1 %cond
br i1 %cond, label %taken, label %untaken
@@ -37,10 +37,10 @@ continue:
; CHECK-LABEL: continue:
; CHECK: phi
; CHECK-DAG: [ %q.relocated, %safepoint ]
-; CHECK-DAG [ %q, %entry ]
+; CHECK-DAG: [ %q, %entry ]
; CHECK: phi
; CHECK-DAG: [ %p.relocated, %safepoint ]
-; CHECK-DAG [ %p, %entry ]
+; CHECK-DAG: [ %p, %entry ]
; CHECK: %cond = icmp
; CHECK: br i1 %cond
br i1 %cond, label %taken, label %untaken
diff --git a/llvm/test/Transforms/SROA/basictest.ll b/llvm/test/Transforms/SROA/basictest.ll
index 25b8e8ba41f..cfd8dd2fb0c 100644
--- a/llvm/test/Transforms/SROA/basictest.ll
+++ b/llvm/test/Transforms/SROA/basictest.ll
@@ -1616,7 +1616,7 @@ define i16 @PR24463() {
; a sub-integer that requires extraction *and* extends past the end of the
; alloca. In this case, we should extract the i8 and then zext it to i16.
;
-; CHECK-LABEL @PR24463(
+; CHECK-LABEL: @PR24463(
; CHECK-NOT: alloca
; CHECK: %[[SHIFT:.*]] = lshr i16 0, 8
; CHECK: %[[TRUNC:.*]] = trunc i16 %[[SHIFT]] to i8
diff --git a/llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll b/llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll
index fee1ff0433b..8a506c3e396 100644
--- a/llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll
+++ b/llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll
@@ -41,7 +41,7 @@ ENDIF: ; preds = %LOOP
br i1 %tmp31, label %IF29, label %ENDIF28
; CHECK: Flow:
-; CHECK br i1 %{{[0-9]+}}, label %Flow, label %LOOP
+; CHECK: br i1 %{{[0-9]+}}, label %Flow2, label %LOOP
; CHECK: IF29:
; CHECK: br label %Flow1
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