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author | Chen Zheng <czhengsz@cn.ibm.com> | 2019-07-04 01:51:47 +0000 |
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committer | Chen Zheng <czhengsz@cn.ibm.com> | 2019-07-04 01:51:47 +0000 |
commit | 469f30ababa5fea0dafe8dd4592c3b0a1298d6fc (patch) | |
tree | c6cf09054ebff61d49ec789d00d20183b33ab439 /llvm/test/Transforms | |
parent | 57835bcfbd862b169e1159bb2cc0c4980ebb5af4 (diff) | |
download | bcm5719-llvm-469f30ababa5fea0dafe8dd4592c3b0a1298d6fc.tar.gz bcm5719-llvm-469f30ababa5fea0dafe8dd4592c3b0a1298d6fc.zip |
[PowerPC] Hardware Loop branch instruction's condition may not be icmp.
This fixes pr42492.
Differential Revision: https://reviews.llvm.org/D64124
llvm-svn: 365104
Diffstat (limited to 'llvm/test/Transforms')
-rw-r--r-- | llvm/test/Transforms/HardwareLoops/unscevable.ll | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/llvm/test/Transforms/HardwareLoops/unscevable.ll b/llvm/test/Transforms/HardwareLoops/unscevable.ll index 63932c5682f..cd9c3e7863b 100644 --- a/llvm/test/Transforms/HardwareLoops/unscevable.ll +++ b/llvm/test/Transforms/HardwareLoops/unscevable.ll @@ -45,3 +45,35 @@ while.body: while.end: ret void } + +; CHECK-LABEL: variant_counter2 +; CHECK-NOT: set.loop.iterations +; CHECK-NOT: loop.decrement +define void @variant_counter2(i8*, i8*, i64*) { + %4 = icmp eq i8* %0, %1 + br i1 %4, label %9, label %5 + +5: ; preds = %3 + %6 = getelementptr inbounds i64, i64* %2, i64 1 + %7 = load i64, i64* %6, align 8 + br label %10 + +8: ; preds = %10 + store i64 %14, i64* %6, align 8 + br label %9 + +9: ; preds = %8, %3 + ret void + +10: ; preds = %5, %10 + %11 = phi i64 [ %7, %5 ], [ %14, %10 ] + %12 = phi i32 [ 0, %5 ], [ %15, %10 ] + %13 = phi i8* [ %0, %5 ], [ %16, %10 ] + %14 = shl nsw i64 %11, 4 + %15 = add nuw nsw i32 %12, 1 + %16 = getelementptr inbounds i8, i8* %13, i64 1 + %17 = icmp ugt i32 %12, 14 + %18 = icmp eq i8* %16, %1 + %19 = or i1 %18, %17 + br i1 %19, label %8, label %10 +} |