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| author | Craig Topper <craig.topper@gmail.com> | 2017-04-17 01:51:16 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2017-04-17 01:51:16 +0000 |
| commit | 43b012b1b3facbcd0cba69fa4154e89136ecf962 (patch) | |
| tree | 8a107d3375bdb41744825c2cb83f2c9da72d6fbe /llvm/test/Transforms | |
| parent | ee654bf5f199dbed8c7378e58e5f3ec9968d1f71 (diff) | |
| download | bcm5719-llvm-43b012b1b3facbcd0cba69fa4154e89136ecf962.tar.gz bcm5719-llvm-43b012b1b3facbcd0cba69fa4154e89136ecf962.zip | |
[InstCombine] Add test cases for missing support for turning vector sdiv into udiv. NFC
llvm-svn: 300434
Diffstat (limited to 'llvm/test/Transforms')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/div-shift.ll | 15 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/div.ll | 11 |
2 files changed, 26 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/div-shift.ll b/llvm/test/Transforms/InstCombine/div-shift.ll index 517313ed8e4..5642241c96f 100644 --- a/llvm/test/Transforms/InstCombine/div-shift.ll +++ b/llvm/test/Transforms/InstCombine/div-shift.ll @@ -16,6 +16,21 @@ entry: ret i32 %d } +define <2 x i32> @t1vec(<2 x i16> %x, <2 x i32> %y) { +; CHECK-LABEL: @t1vec( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[CONV:%.*]] = zext <2 x i16> [[X:%.*]] to <2 x i32> +; CHECK-NEXT: [[S:%.*]] = shl nuw <2 x i32> <i32 2, i32 2>, [[Y:%.*]] +; CHECK-NEXT: [[D:%.*]] = sdiv <2 x i32> [[CONV]], [[S]] +; CHECK-NEXT: ret <2 x i32> [[D]] +; +entry: + %conv = zext <2 x i16> %x to <2 x i32> + %s = shl <2 x i32> <i32 2, i32 2>, %y + %d = sdiv <2 x i32> %conv, %s + ret <2 x i32> %d +} + ; rdar://11721329 define i64 @t2(i64 %x, i32 %y) { ; CHECK-LABEL: @t2( diff --git a/llvm/test/Transforms/InstCombine/div.ll b/llvm/test/Transforms/InstCombine/div.ll index a037607267a..99cd6962e95 100644 --- a/llvm/test/Transforms/InstCombine/div.ll +++ b/llvm/test/Transforms/InstCombine/div.ll @@ -388,6 +388,17 @@ define i32 @test35(i32 %A) { ret i32 %mul } +define <2 x i32> @test35vec(<2 x i32> %A) { +; CHECK-LABEL: @test35vec( +; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[A:%.*]], <i32 2147483647, i32 2147483647> +; CHECK-NEXT: [[MUL:%.*]] = sdiv exact <2 x i32> [[AND]], <i32 2147483647, i32 2147483647> +; CHECK-NEXT: ret <2 x i32> [[MUL]] +; + %and = and <2 x i32> %A, <i32 2147483647, i32 2147483647> + %mul = sdiv exact <2 x i32> %and, <i32 2147483647, i32 2147483647> + ret <2 x i32> %mul +} + define i32 @test36(i32 %A) { ; CHECK-LABEL: @test36( ; CHECK-NEXT: [[AND:%.*]] = and i32 %A, 2147483647 |
