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| author | Haicheng Wu <haicheng@codeaurora.org> | 2017-01-20 03:09:11 +0000 |
|---|---|---|
| committer | Haicheng Wu <haicheng@codeaurora.org> | 2017-01-20 03:09:11 +0000 |
| commit | 1af1f071ea36208afd806ecb0205525fa5bd8225 (patch) | |
| tree | 766878187825a430fbd0b192f4251b2606b41742 /llvm/test/Transforms | |
| parent | f002264d499ec9b6c69ac1cdfa9b9bd783ad63c6 (diff) | |
| download | bcm5719-llvm-1af1f071ea36208afd806ecb0205525fa5bd8225.tar.gz bcm5719-llvm-1af1f071ea36208afd806ecb0205525fa5bd8225.zip | |
Recommit "[InlineCost] Use TTI to check if GEP is free."
This recommits r292526 which is reverted in r292529 after fixing the test case.
The original summary:
Currently, a GEP is considered free only if its indices are all constant.
TTI::getGEPCost() can give target-specific more accurate analysis. TTI is
already used for the cost of many other instructions.
llvm-svn: 292570
Diffstat (limited to 'llvm/test/Transforms')
| -rw-r--r-- | llvm/test/Transforms/Inline/gep-cost.ll | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/llvm/test/Transforms/Inline/gep-cost.ll b/llvm/test/Transforms/Inline/gep-cost.ll new file mode 100644 index 00000000000..442f7589176 --- /dev/null +++ b/llvm/test/Transforms/Inline/gep-cost.ll @@ -0,0 +1,30 @@ +; REQUIRES: asserts +; RUN: opt -inline < %s -mtriple=aarch64--linux-gnu -mcpu=kryo -S -debug-only=inline-cost 2>&1 | FileCheck %s + +target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" +target triple = "aarch64--linux-gnu" + +define void @outer([4 x i32]* %ptr, i32 %i) { + call void @inner1([4 x i32]* %ptr, i32 %i) + call void @inner2([4 x i32]* %ptr, i32 %i) + ret void +} +; The gep in inner1() is reg+reg, which is a legal addressing mode for AArch64. +; Thus, both the gep and ret can be simplified. +; CHECK: Analyzing call of inner1 +; CHECK: NumInstructionsSimplified: 2 +; CHECK: NumInstructions: 2 +define void @inner1([4 x i32]* %ptr, i32 %i) { + %G = getelementptr inbounds [4 x i32], [4 x i32]* %ptr, i32 0, i32 %i + ret void +} + +; The gep in inner2() is reg+imm+reg, which is not a legal addressing mode for +; AArch64. Thus, only the ret can be simplified and not the gep. +; CHECK: Analyzing call of inner2 +; CHECK: NumInstructionsSimplified: 1 +; CHECK: NumInstructions: 2 +define void @inner2([4 x i32]* %ptr, i32 %i) { + %G = getelementptr inbounds [4 x i32], [4 x i32]* %ptr, i32 1, i32 %i + ret void +} |

