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| author | Mandeep Singh Grang <mgrang@codeaurora.org> | 2016-11-21 20:39:08 +0000 |
|---|---|---|
| committer | Mandeep Singh Grang <mgrang@codeaurora.org> | 2016-11-21 20:39:08 +0000 |
| commit | 17e3f9b79dd6ffe4200e2cf102f22d90dea99171 (patch) | |
| tree | c0b4830f1834f1878dac1c706b25fa35bc1aed17 /llvm/test/Transforms/Util | |
| parent | 40a5040cd831afff43045ffa2d360fc30c6091b0 (diff) | |
| download | bcm5719-llvm-17e3f9b79dd6ffe4200e2cf102f22d90dea99171.tar.gz bcm5719-llvm-17e3f9b79dd6ffe4200e2cf102f22d90dea99171.zip | |
[MemorySSA] Fix unit tests broken by D26704
Summary:
D26704 fixed the non-determinism in codegen by sorting basic blocks before
iteration so as to have a defined iteration order. As a result we need to fix
the names (numbers) of the temporaries in the following unit tests:
test/Transforms/Util/MemorySSA/multi-edges.ll
test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll
Reviewers: dberlin, david2050, mgrang
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D26926
llvm-svn: 287575
Diffstat (limited to 'llvm/test/Transforms/Util')
| -rw-r--r-- | llvm/test/Transforms/Util/MemorySSA/multi-edges.ll | 8 | ||||
| -rw-r--r-- | llvm/test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll | 10 |
2 files changed, 9 insertions, 9 deletions
diff --git a/llvm/test/Transforms/Util/MemorySSA/multi-edges.ll b/llvm/test/Transforms/Util/MemorySSA/multi-edges.ll index c13fc016b2c..5d47728d6f5 100644 --- a/llvm/test/Transforms/Util/MemorySSA/multi-edges.ll +++ b/llvm/test/Transforms/Util/MemorySSA/multi-edges.ll @@ -13,15 +13,15 @@ entry: br i1 %a, label %Loop.Body, label %Loop.End Loop.Body: -; CHECK: 4 = MemoryPhi({entry,1},{Loop.End,3}) -; CHECK-NEXT: 2 = MemoryDef(4) +; CHECK: 3 = MemoryPhi({entry,1},{Loop.End,4}) +; CHECK-NEXT: 2 = MemoryDef(3) ; CHECK-NEXT: store i32 5 store i32 5, i32* %0, align 4 br i1 %a, label %Loop.End, label %Loop.End ; WhyDoWeEvenHaveThatLever.gif Loop.End: -; CHECK: 3 = MemoryPhi({entry,1},{Loop.Body,2},{Loop.Body,2}) -; CHECK-NEXT: MemoryUse(3) +; CHECK: 4 = MemoryPhi({entry,1},{Loop.Body,2},{Loop.Body,2}) +; CHECK-NEXT: MemoryUse(4) ; CHECK-NEXT: %1 = load %1 = load i32, i32* %0, align 4 %2 = icmp eq i32 5, %1 diff --git a/llvm/test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll b/llvm/test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll index 473b3685801..005a37c9add 100644 --- a/llvm/test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll +++ b/llvm/test/Transforms/Util/MemorySSA/multiple-backedges-hal.ll @@ -42,22 +42,22 @@ Entry: br label %OuterLoop OuterLoop: -; CHECK: 5 = MemoryPhi({Entry,1},{InnerLoop.Tail,3}) +; CHECK: 4 = MemoryPhi({Entry,1},{InnerLoop.Tail,3}) ; CHECK-NEXT: %Val.Outer = %Val.Outer = call i8 @getValue() -; CHECK: 2 = MemoryDef(5) +; CHECK: 2 = MemoryDef(4) ; CHECK-NEXT: store i8 %Val.Outer store i8 %Val.Outer, i8* %Arg call void @doThingWithoutReading() br label %InnerLoop InnerLoop: -; CHECK: 4 = MemoryPhi({OuterLoop,2},{InnerLoop,3}) -; CHECK-NEXT: ; MemoryUse(4) +; CHECK: 5 = MemoryPhi({OuterLoop,2},{InnerLoop,3}) +; CHECK-NEXT: ; MemoryUse(5) ; CHECK-NEXT: %StartingAccess = load %StartingAccess = load i8, i8* %Arg, align 4 %Val.Inner = call i8 @getValue() -; CHECK: 3 = MemoryDef(4) +; CHECK: 3 = MemoryDef(5) ; CHECK-NEXT: store i8 %Val.Inner store i8 %Val.Inner, i8* %Arg call void @doThingWithoutReading() |
