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authorAdam Nemet <anemet@apple.com>2018-02-24 17:29:09 +0000
committerAdam Nemet <anemet@apple.com>2018-02-24 17:29:09 +0000
commite4e1de60aad588eef8e564fd3b6f00cf2b9e3311 (patch)
tree266bc1c7bd08bc27327bcd4edd179e1a96ff3f7c /llvm/test/Transforms/StructurizeCFG
parent38bbc16a8b1eb04fca23485af441e3282301d885 (diff)
downloadbcm5719-llvm-e4e1de60aad588eef8e564fd3b6f00cf2b9e3311.tar.gz
bcm5719-llvm-e4e1de60aad588eef8e564fd3b6f00cf2b9e3311.zip
Revert "StructurizeCFG: Test for branch divergence correctly"
This reverts commit r325881. Breaks many bots llvm-svn: 326037
Diffstat (limited to 'llvm/test/Transforms/StructurizeCFG')
-rw-r--r--llvm/test/Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll82
1 files changed, 0 insertions, 82 deletions
diff --git a/llvm/test/Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll b/llvm/test/Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll
deleted file mode 100644
index 0e613721564..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll
+++ /dev/null
@@ -1,82 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=amdgcn-- -S -o - -structurizecfg -structurizecfg-skip-uniform-regions < %s | FileCheck %s
-
-define amdgpu_cs void @uniform(i32 inreg %v) {
-; CHECK-LABEL: @uniform(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CC:%.*]] = icmp eq i32 [[V:%.*]], 0
-; CHECK-NEXT: br i1 [[CC]], label [[IF:%.*]], label [[END:%.*]], !structurizecfg.uniform !0
-; CHECK: if:
-; CHECK-NEXT: br label [[END]], !structurizecfg.uniform !0
-; CHECK: end:
-; CHECK-NEXT: ret void
-;
-entry:
- %cc = icmp eq i32 %v, 0
- br i1 %cc, label %if, label %end
-
-if:
- br label %end
-
-end:
- ret void
-}
-
-define amdgpu_cs void @nonuniform(i32 addrspace(2)* %ptr) {
-; CHECK-LABEL: @nonuniform(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: br label [[FOR_BODY:%.*]]
-; CHECK: for.body:
-; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[FLOW:%.*]] ]
-; CHECK-NEXT: [[CC:%.*]] = icmp ult i32 [[I]], 4
-; CHECK-NEXT: br i1 [[CC]], label [[MID_LOOP:%.*]], label [[FLOW]]
-; CHECK: mid.loop:
-; CHECK-NEXT: [[V:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
-; CHECK-NEXT: [[CC2:%.*]] = icmp eq i32 [[V]], 0
-; CHECK-NEXT: br i1 [[CC2]], label [[END_LOOP:%.*]], label [[FLOW1:%.*]]
-; CHECK: Flow:
-; CHECK-NEXT: [[TMP0]] = phi i32 [ [[TMP2:%.*]], [[FLOW1]] ], [ undef, [[FOR_BODY]] ]
-; CHECK-NEXT: [[TMP1:%.*]] = phi i1 [ [[TMP3:%.*]], [[FLOW1]] ], [ true, [[FOR_BODY]] ]
-; CHECK-NEXT: br i1 [[TMP1]], label [[FOR_END:%.*]], label [[FOR_BODY]]
-; CHECK: end.loop:
-; CHECK-NEXT: [[I_INC:%.*]] = add i32 [[I]], 1
-; CHECK-NEXT: br label [[FLOW1]]
-; CHECK: Flow1:
-; CHECK-NEXT: [[TMP2]] = phi i32 [ [[I_INC]], [[END_LOOP]] ], [ undef, [[MID_LOOP]] ]
-; CHECK-NEXT: [[TMP3]] = phi i1 [ false, [[END_LOOP]] ], [ true, [[MID_LOOP]] ]
-; CHECK-NEXT: br label [[FLOW]]
-; CHECK: for.end:
-; CHECK-NEXT: br i1 [[CC]], label [[IF:%.*]], label [[END:%.*]]
-; CHECK: if:
-; CHECK-NEXT: br label [[END]]
-; CHECK: end:
-; CHECK-NEXT: ret void
-;
-entry:
- br label %for.body
-
-for.body:
- %i = phi i32 [0, %entry], [%i.inc, %end.loop]
- %cc = icmp ult i32 %i, 4
- br i1 %cc, label %mid.loop, label %for.end
-
-mid.loop:
- %v = call i32 @llvm.amdgcn.workitem.id.x()
- %cc2 = icmp eq i32 %v, 0
- br i1 %cc2, label %end.loop, label %for.end
-
-end.loop:
- %i.inc = add i32 %i, 1
- br label %for.body
-
-for.end:
- br i1 %cc, label %if, label %end
-
-if:
- br label %end
-
-end:
- ret void
-}
-
-declare i32 @llvm.amdgcn.workitem.id.x()
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