Temporarily Revert "Add basic loop fusion pass."

As it's causing some bot failures (and per request from kbarton).

This reverts commit r358543/ab70da07286e618016e78247e4a24fcb84077fda.

llvm-svn: 358546

17 files changed, 0 insertions, 1093 deletions

diff --git a/llvm/test/Transforms/StructurizeCFG/AMDGPU/backedge-id-bug-xfail.ll b/llvm/test/Transforms/StructurizeCFG/AMDGPU/backedge-id-bug-xfail.ll
deleted file mode 100644
index e9c54151cf2..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/AMDGPU/backedge-id-bug-xfail.ll
+++ /dev/null
@@ -1,77 +0,0 @@
-; XFAIL: *
-; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -structurizecfg -verify-region-info %s
-
-; FIXME: Merge into backedge-id-bug
-; Variant which has an issue with region construction
-
-define amdgpu_kernel void @loop_backedge_misidentified_alt(i32 addrspace(1)* %arg0) #0 {
-entry:
-  %tmp = load volatile <2 x i32>, <2 x i32> addrspace(1)* undef, align 16
-  %load1 = load volatile <2 x float>, <2 x float> addrspace(1)* undef
-  %tid = call i32 @llvm.amdgcn.workitem.id.x()
-  %gep = getelementptr inbounds i32, i32 addrspace(1)* %arg0, i32 %tid
-  %i.initial = load volatile i32, i32 addrspace(1)* %gep, align 4
-  br label %LOOP.HEADER
-
-LOOP.HEADER:
-  %i = phi i32 [ %i.final, %END_ELSE_BLOCK ], [ %i.initial, %entry ]
-  call void asm sideeffect "s_nop 0x100b ; loop $0 ", "r,~{memory}"(i32 %i) #0
-  %tmp12 = zext i32 %i to i64
-  %tmp13 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* null, i64 %tmp12
-  %tmp14 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp13, align 16
-  %tmp15 = extractelement <4 x i32> %tmp14, i64 0
-  %tmp16 = and i32 %tmp15, 65535
-  %tmp17 = icmp eq i32 %tmp16, 1
-  br i1 %tmp17, label %bb18, label %bb62
-
-bb18:
-  %tmp19 = extractelement <2 x i32> %tmp, i64 0
-  %tmp22 = lshr i32 %tmp19, 16
-  %tmp24 = urem i32 %tmp22, 52
-  %tmp25 = mul nuw nsw i32 %tmp24, 52
-  br label %INNER_LOOP
-
-INNER_LOOP:
-  %inner.loop.j = phi i32 [ %tmp25, %bb18 ], [ %inner.loop.j.inc, %INNER_LOOP ]
-  call void asm sideeffect "; inner loop body", ""() #0
-  %inner.loop.j.inc = add nsw i32 %inner.loop.j, 1
-  %inner.loop.cmp = icmp eq i32 %inner.loop.j, 0
-  br i1 %inner.loop.cmp, label %INNER_LOOP_BREAK, label %INNER_LOOP
-
-INNER_LOOP_BREAK:
-  %tmp59 = extractelement <4 x i32> %tmp14, i64 2
-  call void asm sideeffect "s_nop 23 ", "~{memory}"() #0
-  br label %END_ELSE_BLOCK
-
-bb62:
-  %load13 = icmp ult i32 %tmp16, 271
-  ;br i1 %load13, label %bb64, label %INCREMENT_I
-  ; branching directly to the return avoids the bug
-  br i1 %load13, label %RETURN, label %INCREMENT_I
-
-
-bb64:
-  call void asm sideeffect "s_nop 42", "~{memory}"() #0
-  br label %RETURN
-
-INCREMENT_I:
-  %inc.i = add i32 %i, 1
-  call void asm sideeffect "s_nop 0x1336 ; increment $0", "v,~{memory}"(i32 %inc.i) #0
-  br label %END_ELSE_BLOCK
-
-END_ELSE_BLOCK:
-  %i.final = phi i32 [ %tmp59, %INNER_LOOP_BREAK ], [ %inc.i, %INCREMENT_I ]
-  call void asm sideeffect "s_nop 0x1337 ; end else block $0", "v,~{memory}"(i32 %i.final) #0
-  %cmp.end.else.block = icmp eq i32 %i.final, -1
-  br i1 %cmp.end.else.block, label %RETURN, label %LOOP.HEADER
-
-RETURN:
-  call void asm sideeffect "s_nop 0x99 ; ClosureEval return", "~{memory}"() #0
-  store volatile <2 x float> %load1, <2 x float> addrspace(1)* undef, align 8
-  ret void
-}
-
-declare i32 @llvm.amdgcn.workitem.id.x() #1
-
-attributes #0 = { convergent nounwind }
-attributes #1 = { convergent nounwind readnone }
diff --git a/llvm/test/Transforms/StructurizeCFG/AMDGPU/backedge-id-bug.ll b/llvm/test/Transforms/StructurizeCFG/AMDGPU/backedge-id-bug.ll
deleted file mode 100644
index 5b5ea676bae..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/AMDGPU/backedge-id-bug.ll
+++ /dev/null
@@ -1,164 +0,0 @@
-; XFAIL: *
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -structurizecfg %s | FileCheck %s
-
-; StructurizeCFG::orderNodes used an arbitrary and nonsensical sorting
-; function which broke the basic backedge identification algorithm. It
-; would use RPO order, but then do a weird partial sort by the loop
-; depth assuming blocks are sorted by loop. However a block can appear
-; in between blocks of a loop that is not part of a loop, breaking the
-; assumption of the sort.
-;
-; The collectInfos must be done in RPO order. The actual
-; structurization order I think is less important, but unless the loop
-; headers are identified in RPO order, it finds the wrong set of back
-; edges.
-
-define amdgpu_kernel void @loop_backedge_misidentified(i32 addrspace(1)* %arg0) #0 {
-; CHECK-LABEL: @loop_backedge_misidentified(
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[TMP:%.*]] = load volatile <2 x i32>, <2 x i32> addrspace(1)* undef, align 16
-; CHECK-NEXT:    [[LOAD1:%.*]] = load volatile <2 x float>, <2 x float> addrspace(1)* undef
-; CHECK-NEXT:    [[TID:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
-; CHECK-NEXT:    [[GEP:%.*]] = getelementptr inbounds i32, i32 addrspace(1)* [[ARG0:%.*]], i32 [[TID]]
-; CHECK-NEXT:    [[I_INITIAL:%.*]] = load volatile i32, i32 addrspace(1)* [[GEP]], align 4
-; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]
-; CHECK:       LOOP.HEADER:
-; CHECK-NEXT:    [[I:%.*]] = phi i32 [ [[I_INITIAL]], [[ENTRY:%.*]] ], [ [[TMP10:%.*]], [[FLOW4:%.*]] ]
-; CHECK-NEXT:    call void asm sideeffect "s_nop 0x100b
-; CHECK-NEXT:    [[TMP12:%.*]] = zext i32 [[I]] to i64
-; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* null, i64 [[TMP12]]
-; CHECK-NEXT:    [[TMP14:%.*]] = load <4 x i32>, <4 x i32> addrspace(1)* [[TMP13]], align 16
-; CHECK-NEXT:    [[TMP15:%.*]] = extractelement <4 x i32> [[TMP14]], i64 0
-; CHECK-NEXT:    [[TMP16:%.*]] = and i32 [[TMP15]], 65535
-; CHECK-NEXT:    [[TMP17:%.*]] = icmp eq i32 [[TMP16]], 1
-; CHECK-NEXT:    [[TMP0:%.*]] = xor i1 [[TMP17]], true
-; CHECK-NEXT:    br i1 [[TMP0]], label [[BB62:%.*]], label [[FLOW:%.*]]
-; CHECK:       Flow2:
-; CHECK-NEXT:    br label [[FLOW]]
-; CHECK:       bb18:
-; CHECK-NEXT:    [[TMP19:%.*]] = extractelement <2 x i32> [[TMP]], i64 0
-; CHECK-NEXT:    [[TMP22:%.*]] = lshr i32 [[TMP19]], 16
-; CHECK-NEXT:    [[TMP24:%.*]] = urem i32 [[TMP22]], 52
-; CHECK-NEXT:    [[TMP25:%.*]] = mul nuw nsw i32 [[TMP24]], 52
-; CHECK-NEXT:    br label [[INNER_LOOP:%.*]]
-; CHECK:       Flow3:
-; CHECK-NEXT:    [[TMP1:%.*]] = phi i32 [ [[TMP59:%.*]], [[INNER_LOOP_BREAK:%.*]] ], [ [[TMP7:%.*]], [[FLOW]] ]
-; CHECK-NEXT:    [[TMP2:%.*]] = phi i1 [ true, [[INNER_LOOP_BREAK]] ], [ [[TMP8:%.*]], [[FLOW]] ]
-; CHECK-NEXT:    br i1 [[TMP2]], label [[END_ELSE_BLOCK:%.*]], label [[FLOW4]]
-; CHECK:       INNER_LOOP:
-; CHECK-NEXT:    [[INNER_LOOP_J:%.*]] = phi i32 [ [[INNER_LOOP_J_INC:%.*]], [[INNER_LOOP]] ], [ [[TMP25]], [[BB18:%.*]] ]
-; CHECK-NEXT:    call void asm sideeffect "
-; CHECK-NEXT:    [[INNER_LOOP_J_INC]] = add nsw i32 [[INNER_LOOP_J]], 1
-; CHECK-NEXT:    [[INNER_LOOP_CMP:%.*]] = icmp eq i32 [[INNER_LOOP_J]], 0
-; CHECK-NEXT:    br i1 [[INNER_LOOP_CMP]], label [[INNER_LOOP_BREAK]], label [[INNER_LOOP]]
-; CHECK:       INNER_LOOP_BREAK:
-; CHECK-NEXT:    [[TMP59]] = extractelement <4 x i32> [[TMP14]], i64 2
-; CHECK-NEXT:    call void asm sideeffect "s_nop 23 ", "~{memory}"() #0
-; CHECK-NEXT:    br label [[FLOW3:%.*]]
-; CHECK:       bb62:
-; CHECK-NEXT:    [[LOAD13:%.*]] = icmp ult i32 [[TMP16]], 271
-; CHECK-NEXT:    [[TMP3:%.*]] = xor i1 [[LOAD13]], true
-; CHECK-NEXT:    br i1 [[TMP3]], label [[INCREMENT_I:%.*]], label [[FLOW1:%.*]]
-; CHECK:       Flow1:
-; CHECK-NEXT:    [[TMP4:%.*]] = phi i32 [ [[INC_I:%.*]], [[INCREMENT_I]] ], [ undef, [[BB62]] ]
-; CHECK-NEXT:    [[TMP5:%.*]] = phi i1 [ true, [[INCREMENT_I]] ], [ false, [[BB62]] ]
-; CHECK-NEXT:    [[TMP6:%.*]] = phi i1 [ false, [[INCREMENT_I]] ], [ true, [[BB62]] ]
-; CHECK-NEXT:    br i1 [[TMP6]], label [[BB64:%.*]], label [[FLOW2:%.*]]
-; CHECK:       bb64:
-; CHECK-NEXT:    call void asm sideeffect "s_nop 42", "~{memory}"() #0
-; CHECK-NEXT:    br label [[FLOW2]]
-; CHECK:       Flow:
-; CHECK-NEXT:    [[TMP7]] = phi i32 [ [[TMP4]], [[FLOW2]] ], [ undef, [[LOOP_HEADER]] ]
-; CHECK-NEXT:    [[TMP8]] = phi i1 [ [[TMP5]], [[FLOW2]] ], [ false, [[LOOP_HEADER]] ]
-; CHECK-NEXT:    [[TMP9:%.*]] = phi i1 [ false, [[FLOW2]] ], [ true, [[LOOP_HEADER]] ]
-; CHECK-NEXT:    br i1 [[TMP9]], label [[BB18]], label [[FLOW3]]
-; CHECK:       INCREMENT_I:
-; CHECK-NEXT:    [[INC_I]] = add i32 [[I]], 1
-; CHECK-NEXT:    call void asm sideeffect "s_nop 0x1336
-; CHECK-NEXT:    br label [[FLOW1]]
-; CHECK:       END_ELSE_BLOCK:
-; CHECK-NEXT:    [[I_FINAL:%.*]] = phi i32 [ [[TMP1]], [[FLOW3]] ]
-; CHECK-NEXT:    call void asm sideeffect "s_nop 0x1337
-; CHECK-NEXT:    [[CMP_END_ELSE_BLOCK:%.*]] = icmp eq i32 [[I_FINAL]], -1
-; CHECK-NEXT:    br label [[FLOW4]]
-; CHECK:       Flow4:
-; CHECK-NEXT:    [[TMP10]] = phi i32 [ [[I_FINAL]], [[END_ELSE_BLOCK]] ], [ undef, [[FLOW3]] ]
-; CHECK-NEXT:    [[TMP11:%.*]] = phi i1 [ [[CMP_END_ELSE_BLOCK]], [[END_ELSE_BLOCK]] ], [ true, [[FLOW3]] ]
-; CHECK-NEXT:    br i1 [[TMP11]], label [[RETURN:%.*]], label [[LOOP_HEADER]]
-; CHECK:       RETURN:
-; CHECK-NEXT:    call void asm sideeffect "s_nop 0x99
-; CHECK-NEXT:    store volatile <2 x float> [[LOAD1]], <2 x float> addrspace(1)* undef, align 8
-; CHECK-NEXT:    ret void
-;
-entry:
-  %tmp = load volatile <2 x i32>, <2 x i32> addrspace(1)* undef, align 16
-  %load1 = load volatile <2 x float>, <2 x float> addrspace(1)* undef
-  %tid = call i32 @llvm.amdgcn.workitem.id.x()
-  %gep = getelementptr inbounds i32, i32 addrspace(1)* %arg0, i32 %tid
-  %i.initial = load volatile i32, i32 addrspace(1)* %gep, align 4
-  br label %LOOP.HEADER
-
-LOOP.HEADER:
-  %i = phi i32 [ %i.final, %END_ELSE_BLOCK ], [ %i.initial, %entry ]
-  call void asm sideeffect "s_nop 0x100b ; loop $0 ", "r,~{memory}"(i32 %i) #0
-  %tmp12 = zext i32 %i to i64
-  %tmp13 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* null, i64 %tmp12
-  %tmp14 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp13, align 16
-  %tmp15 = extractelement <4 x i32> %tmp14, i64 0
-  %tmp16 = and i32 %tmp15, 65535
-  %tmp17 = icmp eq i32 %tmp16, 1
-  br i1 %tmp17, label %bb18, label %bb62
-
-bb18:
-  %tmp19 = extractelement <2 x i32> %tmp, i64 0
-  %tmp22 = lshr i32 %tmp19, 16
-  %tmp24 = urem i32 %tmp22, 52
-  %tmp25 = mul nuw nsw i32 %tmp24, 52
-  br label %INNER_LOOP
-
-INNER_LOOP:
-  %inner.loop.j = phi i32 [ %tmp25, %bb18 ], [ %inner.loop.j.inc, %INNER_LOOP ]
-  call void asm sideeffect "; inner loop body", ""() #0
-  %inner.loop.j.inc = add nsw i32 %inner.loop.j, 1
-  %inner.loop.cmp = icmp eq i32 %inner.loop.j, 0
-  br i1 %inner.loop.cmp, label %INNER_LOOP_BREAK, label %INNER_LOOP
-
-INNER_LOOP_BREAK:
-  %tmp59 = extractelement <4 x i32> %tmp14, i64 2
-  call void asm sideeffect "s_nop 23 ", "~{memory}"() #0
-  br label %END_ELSE_BLOCK
-
-bb62:
-  %load13 = icmp ult i32 %tmp16, 271
-  br i1 %load13, label %bb64, label %INCREMENT_I
-
-bb64:
-  call void asm sideeffect "s_nop 42", "~{memory}"() #0
-  br label %RETURN
-
-INCREMENT_I:
-  %inc.i = add i32 %i, 1
-  call void asm sideeffect "s_nop 0x1336 ; increment $0", "v,~{memory}"(i32 %inc.i) #0
-  br label %END_ELSE_BLOCK
-
-END_ELSE_BLOCK:
-  %i.final = phi i32 [ %tmp59, %INNER_LOOP_BREAK ], [ %inc.i, %INCREMENT_I ]
-  call void asm sideeffect "s_nop 0x1337 ; end else block $0", "v,~{memory}"(i32 %i.final) #0
-  %cmp.end.else.block = icmp eq i32 %i.final, -1
-  br i1 %cmp.end.else.block, label %RETURN, label %LOOP.HEADER
-
-RETURN:
-  call void asm sideeffect "s_nop 0x99 ; ClosureEval return", "~{memory}"() #0
-  store volatile <2 x float> %load1, <2 x float> addrspace(1)* undef, align 8
-  ret void
-}
-
-; The same function, except break to return block goes directly to the
-; return, which managed to hide the bug.
-; FIXME: Merge variant from backedge-id-bug-xfail
-
-declare i32 @llvm.amdgcn.workitem.id.x() #1
-
-attributes #0 = { convergent nounwind }
-attributes #1 = { convergent nounwind readnone }
diff --git a/llvm/test/Transforms/StructurizeCFG/AMDGPU/lit.local.cfg b/llvm/test/Transforms/StructurizeCFG/AMDGPU/lit.local.cfg
deleted file mode 100644
index 2a665f06be7..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/AMDGPU/lit.local.cfg
+++ /dev/null
@@ -1,2 +0,0 @@
-if not 'AMDGPU' in config.root.targets:
-    config.unsupported = True
diff --git a/llvm/test/Transforms/StructurizeCFG/AMDGPU/loop-subregion-misordered.ll b/llvm/test/Transforms/StructurizeCFG/AMDGPU/loop-subregion-misordered.ll
deleted file mode 100644
index e0759911b9c..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/AMDGPU/loop-subregion-misordered.ll
+++ /dev/null
@@ -1,165 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -structurizecfg %s | FileCheck %s
-;
-; StructurizeCFG::orderNodes basically uses a reverse post-order (RPO) traversal of the region
-; list to get the order. The only problem with it is that sometimes backedges
-; for outer loops will be visited before backedges for inner loops. To solve this problem,
-; a loop depth based approach has been used to make sure all blocks in this loop has been visited
-; before moving on to outer loop.
-;
-; However, we found a problem for a SubRegion which is a loop itself:
-;                   _
-;                  | |
-;                  V |
-;      --> BB1 --> BB2 --> BB3 -->
-;
-; In this case, BB2 is a SubRegion (loop), and thus its loopdepth is different than that of
-; BB1 and BB3. This fact will lead BB2 to be placed in the wrong order.
-;
-; In this work, we treat the SubRegion as a special case and use its exit block to determine
-; the loop and its depth to guard the sorting.
-define amdgpu_kernel void @loop_subregion_misordered(i32 addrspace(1)* %arg0) #0 {
-; CHECK-LABEL: @loop_subregion_misordered(
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[TMP:%.*]] = load volatile <2 x i32>, <2 x i32> addrspace(1)* undef, align 16
-; CHECK-NEXT:    [[LOAD1:%.*]] = load volatile <2 x float>, <2 x float> addrspace(1)* undef
-; CHECK-NEXT:    [[TID:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
-; CHECK-NEXT:    [[GEP:%.*]] = getelementptr inbounds i32, i32 addrspace(1)* [[ARG0:%.*]], i32 [[TID]]
-; CHECK-NEXT:    [[I_INITIAL:%.*]] = load volatile i32, i32 addrspace(1)* [[GEP]], align 4
-; CHECK-NEXT:    br label [[LOOP_HEADER:%.*]]
-; CHECK:       LOOP.HEADER:
-; CHECK-NEXT:    [[I:%.*]] = phi i32 [ [[I_INITIAL]], [[ENTRY:%.*]] ], [ [[TMP7:%.*]], [[FLOW3:%.*]] ]
-; CHECK-NEXT:    call void asm sideeffect "s_nop 0x100b
-; CHECK-NEXT:    [[TMP12:%.*]] = zext i32 [[I]] to i64
-; CHECK-NEXT:    [[TMP13:%.*]] = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* null, i64 [[TMP12]]
-; CHECK-NEXT:    [[TMP14:%.*]] = load <4 x i32>, <4 x i32> addrspace(1)* [[TMP13]], align 16
-; CHECK-NEXT:    [[TMP15:%.*]] = extractelement <4 x i32> [[TMP14]], i64 0
-; CHECK-NEXT:    [[TMP16:%.*]] = and i32 [[TMP15]], 65535
-; CHECK-NEXT:    [[TMP17:%.*]] = icmp eq i32 [[TMP16]], 1
-; CHECK-NEXT:    [[TMP0:%.*]] = xor i1 [[TMP17]], true
-; CHECK-NEXT:    br i1 [[TMP0]], label [[BB62:%.*]], label [[FLOW:%.*]]
-; CHECK:       Flow1:
-; CHECK-NEXT:    [[TMP1:%.*]] = phi i32 [ [[INC_I:%.*]], [[INCREMENT_I:%.*]] ], [ undef, [[BB62]] ]
-; CHECK-NEXT:    [[TMP2:%.*]] = phi i1 [ false, [[INCREMENT_I]] ], [ true, [[BB62]] ]
-; CHECK-NEXT:    [[TMP3:%.*]] = phi i1 [ true, [[INCREMENT_I]] ], [ false, [[BB62]] ]
-; CHECK-NEXT:    br label [[FLOW]]
-; CHECK:       bb18:
-; CHECK-NEXT:    [[TMP19:%.*]] = extractelement <2 x i32> [[TMP]], i64 0
-; CHECK-NEXT:    [[TMP22:%.*]] = lshr i32 [[TMP19]], 16
-; CHECK-NEXT:    [[TMP24:%.*]] = urem i32 [[TMP22]], 52
-; CHECK-NEXT:    [[TMP25:%.*]] = mul nuw nsw i32 [[TMP24]], 52
-; CHECK-NEXT:    br label [[INNER_LOOP:%.*]]
-; CHECK:       Flow2:
-; CHECK-NEXT:    [[TMP4:%.*]] = phi i32 [ [[TMP59:%.*]], [[INNER_LOOP_BREAK:%.*]] ], [ [[TMP9:%.*]], [[FLOW]] ]
-; CHECK-NEXT:    [[TMP5:%.*]] = phi i1 [ true, [[INNER_LOOP_BREAK]] ], [ [[TMP11:%.*]], [[FLOW]] ]
-; CHECK-NEXT:    br i1 [[TMP5]], label [[END_ELSE_BLOCK:%.*]], label [[FLOW3]]
-; CHECK:       INNER_LOOP:
-; CHECK-NEXT:    [[INNER_LOOP_J:%.*]] = phi i32 [ [[INNER_LOOP_J_INC:%.*]], [[INNER_LOOP]] ], [ [[TMP25]], [[BB18:%.*]] ]
-; CHECK-NEXT:    call void asm sideeffect "
-; CHECK-NEXT:    [[INNER_LOOP_J_INC]] = add nsw i32 [[INNER_LOOP_J]], 1
-; CHECK-NEXT:    [[INNER_LOOP_CMP:%.*]] = icmp eq i32 [[INNER_LOOP_J]], 0
-; CHECK-NEXT:    br i1 [[INNER_LOOP_CMP]], label [[INNER_LOOP_BREAK]], label [[INNER_LOOP]]
-; CHECK:       INNER_LOOP_BREAK:
-; CHECK-NEXT:    [[TMP59]] = extractelement <4 x i32> [[TMP14]], i64 2
-; CHECK-NEXT:    call void asm sideeffect "s_nop 23 ", "~{memory}"() #0
-; CHECK-NEXT:    br label [[FLOW2:%.*]]
-; CHECK:       bb62:
-; CHECK-NEXT:    [[LOAD13:%.*]] = icmp ult i32 [[TMP16]], 271
-; CHECK-NEXT:    [[TMP6:%.*]] = xor i1 [[LOAD13]], true
-; CHECK-NEXT:    br i1 [[TMP6]], label [[INCREMENT_I]], label [[FLOW1:%.*]]
-; CHECK:       Flow3:
-; CHECK-NEXT:    [[TMP7]] = phi i32 [ [[I_FINAL:%.*]], [[END_ELSE_BLOCK]] ], [ undef, [[FLOW2]] ]
-; CHECK-NEXT:    [[TMP8:%.*]] = phi i1 [ [[CMP_END_ELSE_BLOCK:%.*]], [[END_ELSE_BLOCK]] ], [ true, [[FLOW2]] ]
-; CHECK-NEXT:    br i1 [[TMP8]], label [[FLOW4:%.*]], label [[LOOP_HEADER]]
-; CHECK:       Flow4:
-; CHECK-NEXT:    br i1 [[TMP10:%.*]], label [[BB64:%.*]], label [[RETURN:%.*]]
-; CHECK:       bb64:
-; CHECK-NEXT:    call void asm sideeffect "s_nop 42", "~{memory}"() #0
-; CHECK-NEXT:    br label [[RETURN]]
-; CHECK:       Flow:
-; CHECK-NEXT:    [[TMP9]] = phi i32 [ [[TMP1]], [[FLOW1]] ], [ undef, [[LOOP_HEADER]] ]
-; CHECK-NEXT:    [[TMP10]] = phi i1 [ [[TMP2]], [[FLOW1]] ], [ false, [[LOOP_HEADER]] ]
-; CHECK-NEXT:    [[TMP11]] = phi i1 [ [[TMP3]], [[FLOW1]] ], [ false, [[LOOP_HEADER]] ]
-; CHECK-NEXT:    [[TMP12:%.*]] = phi i1 [ false, [[FLOW1]] ], [ true, [[LOOP_HEADER]] ]
-; CHECK-NEXT:    br i1 [[TMP12]], label [[BB18]], label [[FLOW2]]
-; CHECK:       INCREMENT_I:
-; CHECK-NEXT:    [[INC_I]] = add i32 [[I]], 1
-; CHECK-NEXT:    call void asm sideeffect "s_nop 0x1336
-; CHECK-NEXT:    br label [[FLOW1]]
-; CHECK:       END_ELSE_BLOCK:
-; CHECK-NEXT:    [[I_FINAL]] = phi i32 [ [[TMP4]], [[FLOW2]] ]
-; CHECK-NEXT:    call void asm sideeffect "s_nop 0x1337
-; CHECK-NEXT:    [[CMP_END_ELSE_BLOCK]] = icmp eq i32 [[I_FINAL]], -1
-; CHECK-NEXT:    br label [[FLOW3]]
-; CHECK:       RETURN:
-; CHECK-NEXT:    call void asm sideeffect "s_nop 0x99
-; CHECK-NEXT:    store volatile <2 x float> [[LOAD1]], <2 x float> addrspace(1)* undef, align 8
-; CHECK-NEXT:    ret void
-;
-entry:
-  %tmp = load volatile <2 x i32>, <2 x i32> addrspace(1)* undef, align 16
-  %load1 = load volatile <2 x float>, <2 x float> addrspace(1)* undef
-  %tid = call i32 @llvm.amdgcn.workitem.id.x()
-  %gep = getelementptr inbounds i32, i32 addrspace(1)* %arg0, i32 %tid
-  %i.initial = load volatile i32, i32 addrspace(1)* %gep, align 4
-  br label %LOOP.HEADER
-
-LOOP.HEADER:
-  %i = phi i32 [ %i.final, %END_ELSE_BLOCK ], [ %i.initial, %entry ]
-  call void asm sideeffect "s_nop 0x100b ; loop $0 ", "r,~{memory}"(i32 %i) #0
-  %tmp12 = zext i32 %i to i64
-  %tmp13 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* null, i64 %tmp12
-  %tmp14 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp13, align 16
-  %tmp15 = extractelement <4 x i32> %tmp14, i64 0
-  %tmp16 = and i32 %tmp15, 65535
-  %tmp17 = icmp eq i32 %tmp16, 1
-  br i1 %tmp17, label %bb18, label %bb62
-
-bb18:
-  %tmp19 = extractelement <2 x i32> %tmp, i64 0
-  %tmp22 = lshr i32 %tmp19, 16
-  %tmp24 = urem i32 %tmp22, 52
-  %tmp25 = mul nuw nsw i32 %tmp24, 52
-  br label %INNER_LOOP
-
-INNER_LOOP:
-  %inner.loop.j = phi i32 [ %tmp25, %bb18 ], [ %inner.loop.j.inc, %INNER_LOOP ]
-  call void asm sideeffect "; inner loop body", ""() #0
-  %inner.loop.j.inc = add nsw i32 %inner.loop.j, 1
-  %inner.loop.cmp = icmp eq i32 %inner.loop.j, 0
-  br i1 %inner.loop.cmp, label %INNER_LOOP_BREAK, label %INNER_LOOP
-
-INNER_LOOP_BREAK:
-  %tmp59 = extractelement <4 x i32> %tmp14, i64 2
-  call void asm sideeffect "s_nop 23 ", "~{memory}"() #0
-  br label %END_ELSE_BLOCK
-
-bb62:
-  %load13 = icmp ult i32 %tmp16, 271
-  br i1 %load13, label %bb64, label %INCREMENT_I
-
-bb64:
-  call void asm sideeffect "s_nop 42", "~{memory}"() #0
-  br label %RETURN
-
-INCREMENT_I:
-  %inc.i = add i32 %i, 1
-  call void asm sideeffect "s_nop 0x1336 ; increment $0", "v,~{memory}"(i32 %inc.i) #0
-  br label %END_ELSE_BLOCK
-
-END_ELSE_BLOCK:
-  %i.final = phi i32 [ %tmp59, %INNER_LOOP_BREAK ], [ %inc.i, %INCREMENT_I ]
-  call void asm sideeffect "s_nop 0x1337 ; end else block $0", "v,~{memory}"(i32 %i.final) #0
-  %cmp.end.else.block = icmp eq i32 %i.final, -1
-  br i1 %cmp.end.else.block, label %RETURN, label %LOOP.HEADER
-
-RETURN:
-  call void asm sideeffect "s_nop 0x99 ; ClosureEval return", "~{memory}"() #0
-  store volatile <2 x float> %load1, <2 x float> addrspace(1)* undef, align 8
-  ret void
-}
-
-declare i32 @llvm.amdgcn.workitem.id.x() #1
-
-attributes #0 = { convergent nounwind }
-attributes #1 = { convergent nounwind readnone }
diff --git a/llvm/test/Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll b/llvm/test/Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll
deleted file mode 100644
index 7c8c09b782b..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll
+++ /dev/null
@@ -1,82 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -mtriple=amdgcn-- -S -o - -structurizecfg -structurizecfg-skip-uniform-regions < %s | FileCheck %s
-
-define amdgpu_cs void @uniform(i32 inreg %v) {
-; CHECK-LABEL: @uniform(
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[CC:%.*]] = icmp eq i32 [[V:%.*]], 0
-; CHECK-NEXT:    br i1 [[CC]], label [[IF:%.*]], label [[END:%.*]], !structurizecfg.uniform !0
-; CHECK:       if:
-; CHECK-NEXT:    br label [[END]], !structurizecfg.uniform !0
-; CHECK:       end:
-; CHECK-NEXT:    ret void
-;
-entry:
-  %cc = icmp eq i32 %v, 0
-  br i1 %cc, label %if, label %end
-
-if:
-  br label %end
-
-end:
-  ret void
-}
-
-define amdgpu_cs void @nonuniform(i32 addrspace(4)* %ptr) {
-; CHECK-LABEL: @nonuniform(
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
-; CHECK:       for.body:
-; CHECK-NEXT:    [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP0:%.*]], [[FLOW:%.*]] ]
-; CHECK-NEXT:    [[CC:%.*]] = icmp ult i32 [[I]], 4
-; CHECK-NEXT:    br i1 [[CC]], label [[MID_LOOP:%.*]], label [[FLOW]]
-; CHECK:       mid.loop:
-; CHECK-NEXT:    [[V:%.*]] = call i32 @llvm.amdgcn.workitem.id.x()
-; CHECK-NEXT:    [[CC2:%.*]] = icmp eq i32 [[V]], 0
-; CHECK-NEXT:    br i1 [[CC2]], label [[END_LOOP:%.*]], label [[FLOW1:%.*]]
-; CHECK:       Flow:
-; CHECK-NEXT:    [[TMP0]] = phi i32 [ [[TMP2:%.*]], [[FLOW1]] ], [ undef, [[FOR_BODY]] ]
-; CHECK-NEXT:    [[TMP1:%.*]] = phi i1 [ [[TMP3:%.*]], [[FLOW1]] ], [ true, [[FOR_BODY]] ]
-; CHECK-NEXT:    br i1 [[TMP1]], label [[FOR_END:%.*]], label [[FOR_BODY]]
-; CHECK:       end.loop:
-; CHECK-NEXT:    [[I_INC:%.*]] = add i32 [[I]], 1
-; CHECK-NEXT:    br label [[FLOW1]]
-; CHECK:       Flow1:
-; CHECK-NEXT:    [[TMP2]] = phi i32 [ [[I_INC]], [[END_LOOP]] ], [ undef, [[MID_LOOP]] ]
-; CHECK-NEXT:    [[TMP3]] = phi i1 [ false, [[END_LOOP]] ], [ true, [[MID_LOOP]] ]
-; CHECK-NEXT:    br label [[FLOW]]
-; CHECK:       for.end:
-; CHECK-NEXT:    br i1 [[CC]], label [[IF:%.*]], label [[END:%.*]]
-; CHECK:       if:
-; CHECK-NEXT:    br label [[END]]
-; CHECK:       end:
-; CHECK-NEXT:    ret void
-;
-entry:
-  br label %for.body
-
-for.body:
-  %i = phi i32 [0, %entry], [%i.inc, %end.loop]
-  %cc = icmp ult i32 %i, 4
-  br i1 %cc, label %mid.loop, label %for.end
-
-mid.loop:
-  %v = call i32 @llvm.amdgcn.workitem.id.x()
-  %cc2 = icmp eq i32 %v, 0
-  br i1 %cc2, label %end.loop, label %for.end
-
-end.loop:
-  %i.inc = add i32 %i, 1
-  br label %for.body
-
-for.end:
-  br i1 %cc, label %if, label %end
-
-if:
-  br label %end
-
-end:
-  ret void
-}
-
-declare i32 @llvm.amdgcn.workitem.id.x()
diff --git a/llvm/test/Transforms/StructurizeCFG/branch-on-argument.ll b/llvm/test/Transforms/StructurizeCFG/branch-on-argument.ll
deleted file mode 100644
index cdd4b70592b..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/branch-on-argument.ll
+++ /dev/null
@@ -1,50 +0,0 @@
-; RUN: opt -S -o - -structurizecfg < %s | FileCheck %s
-
-; CHECK-LABEL: @invert_branch_on_arg_inf_loop(
-; CHECK: entry:
-; CHECK: %arg.inv = xor i1 %arg, true
-define void @invert_branch_on_arg_inf_loop(i32 addrspace(1)* %out, i1 %arg) {
-entry:
-  br i1 %arg, label %for.end, label %sesestart
-sesestart:
-  br label %for.body
-
-for.body:                                         ; preds = %entry, %for.body
-  store i32 999, i32 addrspace(1)* %out, align 4
-  br i1 %arg, label %for.body, label %seseend
-seseend:
-  ret void
-
-for.end:                                          ; preds = %Flow
-  ret void
-}
-
-
-; CHECK-LABEL: @invert_branch_on_arg_jump_into_loop(
-; CHECK: entry:
-; CHECK: %arg.inv = xor i1 %arg, true
-; CHECK: Flow:
-; CHECK: Flow1:
-define void @invert_branch_on_arg_jump_into_loop(i32 addrspace(1)* %out, i32 %n, i1 %arg) {
-entry:
-  br label %for.body
-
-for.body:
-  %i = phi i32 [0, %entry], [%i.inc, %end.loop]
-  %ptr = getelementptr i32, i32 addrspace(1)* %out, i32 %i
-  store i32 %i, i32 addrspace(1)* %ptr, align 4
-  br i1 %arg, label %mid.loop, label %end.loop
-
-mid.loop:
-  store i32 333, i32 addrspace(1)* %out, align 4
-  br label %for.end
-
-end.loop:
-  %i.inc = add i32 %i, 1
-  %cmp = icmp ne i32 %i.inc, %n
-  br i1 %cmp, label %for.body, label %for.end
-
-for.end:
-  ret void
-}
-
diff --git a/llvm/test/Transforms/StructurizeCFG/bug36015.ll b/llvm/test/Transforms/StructurizeCFG/bug36015.ll
deleted file mode 100644
index 24b9c9cdde2..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/bug36015.ll
+++ /dev/null
@@ -1,53 +0,0 @@
-; RUN: opt -S -structurizecfg %s | FileCheck %s
-
-; r321751 introduced a bug where control flow branching from if to exit was
-; not handled properly and instead ended up in an infinite loop.
-define void @bug36015(i32 %cmp0, i32 %count) {
-entry:
-  br label %loop.outer
-
-loop.outer:
-  %ctr.loop.outer = phi i32 [ 0, %entry ], [ %ctr.else, %else ]
-  call void @foo(i32 0)
-  br label %loop.inner
-
-loop.inner:
-  %ctr.loop.inner = phi i32 [ %ctr.loop.outer, %loop.outer ], [ %ctr.if, %if ]
-  call void @foo(i32 1)
-  %cond.inner = icmp eq i32 %cmp0, %ctr.loop.inner
-  br i1 %cond.inner, label %if, label %else
-
-; CHECK: if:
-; CHECK:   %0 = xor i1 %cond.if, true
-; CHECK:   br label %Flow
-if:
-  %ctr.if = add i32 %ctr.loop.inner, 1
-  call void @foo(i32 2)
-  %cond.if = icmp slt i32 %ctr.if, %count
-  br i1 %cond.if, label %loop.inner, label %exit
-
-; CHECK: Flow:
-; CHECK:   %2 = phi i1 [ %0, %if ], [ true, %loop.inner ]
-; CHECK:   %3 = phi i1 [ false, %if ], [ true, %loop.inner ]
-; CHECK:   br i1 %2, label %Flow1, label %loop.inner
-
-; CHECK: Flow1:
-; CHECK:   br i1 %3, label %else, label %Flow2
-
-; CHECK: else:
-; CHECK:   br label %Flow2
-else:
-  %ctr.else = add i32 %ctr.loop.inner, 1
-  call void @foo(i32 3)
-  %cond.else = icmp slt i32 %ctr.else, %count
-  br i1 %cond.else, label %loop.outer, label %exit
-
-; CHECK: Flow2:
-; CHECK:   %6 = phi i1 [ %4, %else ], [ true, %Flow1 ]
-; CHECK:   br i1 %6, label %exit, label %loop.outer
-
-exit:
-  ret void
-}
-
-declare void @foo(i32)
diff --git a/llvm/test/Transforms/StructurizeCFG/invert-condition.ll b/llvm/test/Transforms/StructurizeCFG/invert-condition.ll
deleted file mode 100644
index c5db5ad0e4d..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/invert-condition.ll
+++ /dev/null
@@ -1,30 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -structurizecfg %s | FileCheck %s
-
-define void @invert_condition(i1 %arg) {
-; CHECK-LABEL: @invert_condition(
-; CHECK-NEXT:  bb:
-; CHECK-NEXT:    [[TMP:%.*]] = load volatile float, float addrspace(1)* undef
-; CHECK-NEXT:    [[TMP1:%.*]] = load volatile float, float addrspace(1)* undef
-; CHECK-NEXT:    br label [[BB2:%.*]]
-; CHECK:       bb2:
-; CHECK-NEXT:    [[TMP3:%.*]] = fcmp oge float [[TMP]], [[TMP1]]
-; CHECK-NEXT:    [[TMP4:%.*]] = xor i1 [[ARG:%.*]], [[TMP3]]
-; CHECK-NEXT:    [[TMP0:%.*]] = xor i1 [[TMP4]], true
-; CHECK-NEXT:    br i1 [[TMP0]], label [[BB5:%.*]], label [[BB2]]
-; CHECK:       bb5:
-; CHECK-NEXT:    ret void
-;
-bb:
-  %tmp = load volatile float, float addrspace(1)* undef
-  %tmp1 = load volatile float, float addrspace(1)* undef
-  br label %bb2
-
-bb2:                                              ; preds = %bb2, %bb
-  %tmp3 = fcmp oge float %tmp, %tmp1
-  %tmp4 = xor i1 %arg, %tmp3
-  br i1 %tmp4, label %bb2, label %bb5
-
-bb5:                                              ; preds = %bb2
-  ret void
-}
diff --git a/llvm/test/Transforms/StructurizeCFG/invert-constantexpr.ll b/llvm/test/Transforms/StructurizeCFG/invert-constantexpr.ll
deleted file mode 100644
index 61482bb73ad..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/invert-constantexpr.ll
+++ /dev/null
@@ -1,50 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -o - -structurizecfg < %s | FileCheck %s
-
-@g = global i32 0
-
-define void @invert_constantexpr_condition(i32 %arg, i32 %arg1) #0 {
-; CHECK-LABEL: @invert_constantexpr_condition(
-; CHECK-NEXT:  bb:
-; CHECK-NEXT:    [[TMP:%.*]] = icmp eq i32 [[ARG:%.*]], 0
-; CHECK-NEXT:    [[TMP0:%.*]] = xor i1 [[TMP]], true
-; CHECK-NEXT:    br i1 icmp eq (i32 ptrtoint (i32* @g to i32), i32 0), label [[BB2:%.*]], label [[FLOW:%.*]]
-; CHECK:       bb2:
-; CHECK-NEXT:    br label [[FLOW]]
-; CHECK:       bb3:
-; CHECK-NEXT:    [[TMP4:%.*]] = phi i1 [ undef, [[FLOW]] ], [ [[TMP7:%.*]], [[BB6:%.*]] ]
-; CHECK-NEXT:    [[TMP5:%.*]] = or i1 [[TMP4]], icmp eq (i32 ptrtoint (i32* @g to i32), i32 0)
-; CHECK-NEXT:    br label [[BB8:%.*]]
-; CHECK:       Flow:
-; CHECK-NEXT:    [[TMP1:%.*]] = phi i1 [ [[TMP0]], [[BB2]] ], [ icmp ne (i32 ptrtoint (i32* @g to i32), i32 0), [[BB:%.*]] ]
-; CHECK-NEXT:    br i1 [[TMP1]], label [[BB6]], label [[BB3:%.*]]
-; CHECK:       bb6:
-; CHECK-NEXT:    [[TMP7]] = icmp slt i32 [[ARG]], [[ARG1:%.*]]
-; CHECK-NEXT:    br label [[BB3]]
-; CHECK:       bb8:
-; CHECK-NEXT:    ret void
-;
-bb:
-  %tmp = icmp eq i32 %arg, 0
-  br i1 icmp eq (i32 ptrtoint (i32* @g to i32), i32 0), label %bb2, label %bb6
-
-bb2:
-  br i1 %tmp, label %bb3, label %bb6
-
-bb3:
-  %tmp4 = phi i1 [ %tmp7, %bb6 ], [ undef, %bb2 ]
-  %tmp5 = or i1 %tmp4, icmp eq (i32 ptrtoint (i32* @g to i32), i32 0)
-  br i1 %tmp5, label %bb8, label %bb8
-
-bb6:
-  %tmp7 = icmp slt i32 %arg, %arg1
-  br label %bb3
-
-bb8:
-  ret void
-}
-
-declare i32 @llvm.amdgcn.workitem.id.x() #1
-
-attributes #0 = { nounwind }
-attributes #1 = { nounwind readnone }
diff --git a/llvm/test/Transforms/StructurizeCFG/loop-continue-phi.ll b/llvm/test/Transforms/StructurizeCFG/loop-continue-phi.ll
deleted file mode 100644
index 2300aea077f..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/loop-continue-phi.ll
+++ /dev/null
@@ -1,40 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -o - -structurizecfg < %s | FileCheck %s
-
-define void @test1() {
-; CHECK-LABEL: @test1(
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    br label [[LOOP:%.*]]
-; CHECK:       Flow:
-; CHECK-NEXT:    br label [[FLOW1:%.*]]
-; CHECK:       loop:
-; CHECK-NEXT:    [[CTR:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[CTR_NEXT:%.*]], [[FLOW1]] ]
-; CHECK-NEXT:    [[CTR_NEXT]] = add i32 [[CTR]], 1
-; CHECK-NEXT:    br i1 undef, label [[LOOP_A:%.*]], label [[FLOW1]]
-; CHECK:       loop.a:
-; CHECK-NEXT:    br i1 undef, label [[LOOP_B:%.*]], label [[FLOW:%.*]]
-; CHECK:       loop.b:
-; CHECK-NEXT:    br label [[FLOW]]
-; CHECK:       Flow1:
-; CHECK-NEXT:    [[TMP0:%.*]] = phi i1 [ false, [[FLOW]] ], [ true, [[LOOP]] ]
-; CHECK-NEXT:    br i1 [[TMP0]], label [[EXIT:%.*]], label [[LOOP]]
-; CHECK:       exit:
-; CHECK-NEXT:    ret void
-;
-entry:
-  br label %loop
-
-loop:
-  %ctr = phi i32 [ 0, %entry ], [ %ctr.next, %loop.a ], [ %ctr.next, %loop.b ]
-  %ctr.next = add i32 %ctr, 1
-  br i1 undef, label %exit, label %loop.a
-
-loop.a:
-  br i1 undef, label %loop, label %loop.b
-
-loop.b:
-  br label %loop
-
-exit:
-  ret void
-}
diff --git a/llvm/test/Transforms/StructurizeCFG/loop-multiple-exits.ll b/llvm/test/Transforms/StructurizeCFG/loop-multiple-exits.ll
deleted file mode 100644
index 40f6be9670a..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/loop-multiple-exits.ll
+++ /dev/null
@@ -1,50 +0,0 @@
-; RUN: opt -S -structurizecfg %s -o - | FileCheck %s
-;
-; void loop(int *out, int cond_a, int cond_b) {
-;
-;   unsigned i;
-;   for (i = 0; i < cond_a; i++) {
-;     out[i] = i;
-;     if (i > cond_b) {
-;       break;
-;     }
-;     out[i + cond_a] = i;
-;   }
-; }
-
-define void @loop(i32 addrspace(1)* %out, i32 %cond_a, i32 %cond_b) nounwind uwtable {
-entry:
-  br label %for.cond
-
-for.cond:                                         ; preds = %for.inc, %entry
-  %i.0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ]
-  %cmp = icmp ult i32 %i.0, %cond_a
-  br i1 %cmp, label %for.body, label %for.end
-
-; CHECK: for.body:
-for.body:                                         ; preds = %for.cond
-  %arrayidx = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %i.0
-  store i32 %i.0, i32 addrspace(1)* %arrayidx, align 4
-  %cmp1 = icmp ugt i32 %i.0, %cond_b
-; CHECK: br i1 %{{[0-9a-zA-Z_]+}}, label %for.inc, label %[[FLOW1:[0-9a-zA-Z_]+]]
-  br i1 %cmp1, label %for.end, label %for.inc
-
-; CHECK: [[FLOW:[0-9a-zA-Z]+]]:
-; CHECK: br i1 %{{[0-9a-zA-Z_]+}}, label %for.end, label %for.cond
-
-; CHECK: for.inc:
-; CHECK: br label %[[FLOW1]]
-
-for.inc:                                          ; preds = %for.body
-  %0 = add i32 %cond_a, %i.0
-  %arrayidx3 = getelementptr inbounds i32, i32 addrspace(1)* %out, i32 %0
-  store i32 %i.0, i32 addrspace(1)* %arrayidx3, align 4
-  %inc = add i32 %i.0, 1
-  br label %for.cond
-
-; CHECK: [[FLOW1]]
-; CHECK: br label %[[FLOW]]
-
-for.end:                                          ; preds = %for.cond, %for.body
-  ret void
-}
diff --git a/llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll b/llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll
deleted file mode 100644
index 58634d0d37d..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/nested-loop-order.ll
+++ /dev/null
@@ -1,68 +0,0 @@
-; RUN: opt -S -structurizecfg %s -o - | FileCheck %s
-
-define void @main(float addrspace(1)* %out) {
-
-; CHECK: main_body:
-; CHECK: br label %LOOP.outer
-main_body:
-  br label %LOOP.outer
-
-; CHECK: LOOP.outer:
-; CHECK: br label %LOOP
-LOOP.outer:                                       ; preds = %ENDIF28, %main_body
-  %temp8.0.ph = phi float [ 0.000000e+00, %main_body ], [ %tmp35, %ENDIF28 ]
-  %temp4.0.ph = phi i32 [ 0, %main_body ], [ %tmp20, %ENDIF28 ]
-  br label %LOOP
-
-; CHECK: LOOP:
-; br i1 %{{[0-9]+}}, label %ENDIF, label %Flow
-LOOP:                                             ; preds = %IF29, %LOOP.outer
-  %temp4.0 = phi i32 [ %temp4.0.ph, %LOOP.outer ], [ %tmp20, %IF29 ]
-  %tmp20 = add i32 %temp4.0, 1
-  %tmp22 = icmp sgt i32 %tmp20, 3
-  br i1 %tmp22, label %ENDLOOP, label %ENDIF
-
-; CHECK: Flow3
-; CHECK: br i1 %{{[0-9]+}}, label %ENDLOOP, label %LOOP.outer
-
-; CHECK: ENDLOOP:
-; CHECK: ret void
-ENDLOOP:                                          ; preds = %ENDIF28, %IF29, %LOOP
-  %temp8.1 = phi float [ %temp8.0.ph, %LOOP ], [ %temp8.0.ph, %IF29 ], [ %tmp35, %ENDIF28 ]
-  %tmp23 = icmp eq i32 %tmp20, 3
-  %.45 = select i1 %tmp23, float 0.000000e+00, float 1.000000e+00
-  store float %.45, float addrspace(1)* %out
-  ret void
-
-; CHECK: ENDIF:
-; CHECK: br i1 %tmp31, label %IF29, label %Flow1
-ENDIF:                                            ; preds = %LOOP
-  %tmp31 = icmp sgt i32 %tmp20, 1
-  br i1 %tmp31, label %IF29, label %ENDIF28
-
-; CHECK: Flow:
-; CHECK: br i1 %{{[0-9]+}}, label %Flow2, label %LOOP
-
-; CHECK: IF29:
-; CHECK: br label %Flow1
-IF29:                                             ; preds = %ENDIF
-  %tmp32 = icmp sgt i32 %tmp20, 2
-  br i1 %tmp32, label %ENDLOOP, label %LOOP
-
-; CHECK: Flow1:
-; CHECK: br label %Flow
-
-; CHECK: Flow2:
-; CHECK: br i1 %{{[0-9]+}}, label %ENDIF28, label %Flow3
-
-; CHECK: ENDIF28:
-; CHECK: br label %Flow3
-ENDIF28:                                          ; preds = %ENDIF
-  %tmp35 = fadd float %temp8.0.ph, 1.0
-  %tmp36 = icmp sgt i32 %tmp20, 2
-  br i1 %tmp36, label %ENDLOOP, label %LOOP.outer
-}
-
-attributes #0 = { "enable-no-nans-fp-math"="true" "unsafe-fp-math"="true" }
-attributes #1 = { nounwind readnone }
-attributes #2 = { readnone }
diff --git a/llvm/test/Transforms/StructurizeCFG/no-branch-to-entry.ll b/llvm/test/Transforms/StructurizeCFG/no-branch-to-entry.ll
deleted file mode 100644
index b0897ee6c85..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/no-branch-to-entry.ll
+++ /dev/null
@@ -1,38 +0,0 @@
-; XFAIL: *
-
-; This test used to generate a region that caused it to delete the entry block,
-; but it does not anymore after the changes to handling of infinite loops in the
-; PostDominatorTree.
-; TODO: This should be either replaced with another IR or deleted completely.
-
-; RUN: opt -S -o - -structurizecfg -verify-dom-info < %s | FileCheck %s
-
-; CHECK-LABEL: @no_branch_to_entry_undef(
-; CHECK: entry:
-; CHECK-NEXT: br label %entry.orig
-define void @no_branch_to_entry_undef(i32 addrspace(1)* %out) {
-entry:
-  br i1 undef, label %for.end, label %for.body
-
-for.body:                                         ; preds = %entry, %for.body
-  store i32 999, i32 addrspace(1)* %out, align 4
-  br label %for.body
-
-for.end:                                          ; preds = %Flow
-  ret void
-}
-
-; CHECK-LABEL: @no_branch_to_entry_true(
-; CHECK: entry:
-; CHECK-NEXT: br label %entry.orig
-define void @no_branch_to_entry_true(i32 addrspace(1)* %out) {
-entry:
-  br i1 true, label %for.end, label %for.body
-
-for.body:                                         ; preds = %entry, %for.body
-  store i32 999, i32 addrspace(1)* %out, align 4
-  br label %for.body
-
-for.end:                                          ; preds = %Flow
-  ret void
-}
diff --git a/llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll b/llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll
deleted file mode 100644
index 0af25d61b92..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll
+++ /dev/null
@@ -1,45 +0,0 @@
-; RUN: opt -S -structurizecfg %s -o - | FileCheck %s
-
-; CHECK-NOT: br i1 true
-
-define void @blam(i32 addrspace(1)* nocapture %arg, float %arg1, float %arg2) {
-; CHECK: bb:
-bb:
-  br label %bb3
-
-; CHECK: bb3:
-; CHECK:   %0 = xor i1 %tmp4, true
-; CHECK:   br i1 %0, label %bb5, label %Flow
-bb3:                                              ; preds = %bb7, %bb
-  %tmp = phi i64 [ 0, %bb ], [ %tmp8, %bb7 ]
-  %tmp4 = fcmp ult float %arg1, 3.500000e+00
-  br i1 %tmp4, label %bb7, label %bb5
-
-; CHECK: bb5:
-; CHECK:   %1 = xor i1 %tmp6, true
-; CHECK:   br label %Flow
-bb5:                                              ; preds = %bb3
-  %tmp6 = fcmp olt float 0.000000e+00, %arg2
-  br i1 %tmp6, label %bb10, label %bb7
-
-; CHECK: Flow:
-; CHECK:   %2 = phi i1 [ %1, %bb5 ], [ %tmp4, %bb3 ]
-; CHECK:   br i1 %2, label %bb7, label %Flow1
-
-; CHECK: bb7:
-; CHECK:   br label %Flow1
-bb7:                                              ; preds = %bb5, %bb3
-  %tmp8 = add nuw nsw i64 %tmp, 1
-  %tmp9 = icmp slt i64 %tmp8, 5
-  br i1 %tmp9, label %bb3, label %bb10
-
-; CHECK: Flow1:
-; CHECK:   %6 = phi i1 [ %3, %bb7 ], [ true, %Flow ]
-; CHECK:   br i1 %6, label %bb10, label %bb3
-
-; CHECK: bb10:
-bb10:                                             ; preds = %bb7, %bb5
-  %tmp11 = phi i32 [ 15, %bb5 ], [ 255, %bb7 ]
-  store i32 %tmp11, i32 addrspace(1)* %arg, align 4
-  ret void
-}
diff --git a/llvm/test/Transforms/StructurizeCFG/post-order-traversal-bug.ll b/llvm/test/Transforms/StructurizeCFG/post-order-traversal-bug.ll
deleted file mode 100644
index ba9aa291306..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/post-order-traversal-bug.ll
+++ /dev/null
@@ -1,100 +0,0 @@
-; RUN: opt -S -structurizecfg %s -o - | FileCheck %s
-
-; The structurize cfg pass used to do a post-order traversal to generate a list
-; of ; basic blocks and then operate on the list in reverse.  This led to bugs,
-; because sometimes successors would be visited before their predecessors.
-; The fix for this was to do a reverse post-order traversal which is what the
-; algorithm requires.
-
-; Function Attrs: nounwind
-define void @test(float* nocapture %out, i32 %K1, float* nocapture readonly %nr) {
-
-; CHECK: entry:
-; CHECK: br label %for.body
-entry:
-  br label %for.body
-
-; CHECK: for.body:
-; CHECK: br i1 %{{[0-9]+}}, label %lor.lhs.false, label %Flow
-for.body:                                         ; preds = %for.body.backedge, %entry
-  %indvars.iv = phi i64 [ %indvars.iv.be, %for.body.backedge ], [ 1, %entry ]
-  %best_val.027 = phi float [ %best_val.027.be, %for.body.backedge ], [ 5.000000e+01, %entry ]
-  %prev_start.026 = phi i32 [ %tmp26, %for.body.backedge ], [ 0, %entry ]
-  %best_count.025 = phi i32 [ %best_count.025.be, %for.body.backedge ], [ 0, %entry ]
-  %tmp0 = trunc i64 %indvars.iv to i32
-  %cmp1 = icmp eq i32 %tmp0, %K1
-  br i1 %cmp1, label %if.then, label %lor.lhs.false
-
-; CHECK: lor.lhs.false:
-; CHECK: br label %Flow
-lor.lhs.false:                                    ; preds = %for.body
-  %arrayidx = getelementptr inbounds float, float* %nr, i64 %indvars.iv
-  %tmp1 = load float, float* %arrayidx, align 4
-  %tmp2 = add nsw i64 %indvars.iv, -1
-  %arrayidx2 = getelementptr inbounds float, float* %nr, i64 %tmp2
-  %tmp3 = load float, float* %arrayidx2, align 4
-  %cmp3 = fcmp une float %tmp1, %tmp3
-  br i1 %cmp3, label %if.then, label %for.body.1
-
-; CHECK: Flow:
-; CHECK: br i1 %{{[0-9]+}}, label %if.then, label %Flow1
-
-; CHECK: if.then:
-; CHECK: br label %Flow1
-if.then:                                          ; preds = %lor.lhs.false, %for.body
-  %sub4 = sub nsw i32 %tmp0, %prev_start.026
-  %tmp4 = add nsw i64 %indvars.iv, -1
-  %arrayidx8 = getelementptr inbounds float, float* %nr, i64 %tmp4
-  %tmp5 = load float, float* %arrayidx8, align 4
-  br i1 %cmp1, label %for.end, label %for.body.1
-
-; CHECK: for.end:
-; CHECK: ret void
-for.end:                                          ; preds = %for.body.1, %if.then
-  %best_val.0.lcssa = phi float [ %best_val.233, %for.body.1 ], [ %tmp5, %if.then ]
-  store float %best_val.0.lcssa, float* %out, align 4
-  ret void
-
-; CHECK: Flow1
-; CHECK: br i1 %{{[0-9]}}, label %for.body.1, label %Flow2
-
-; CHECK: for.body.1:
-; CHECK: br i1 %{{[0-9]+}}, label %for.body.6, label %Flow3
-for.body.1:                                       ; preds = %if.then, %lor.lhs.false
-  %best_val.233 = phi float [ %tmp5, %if.then ], [ %best_val.027, %lor.lhs.false ]
-  %best_count.231 = phi i32 [ %sub4, %if.then ], [ %best_count.025, %lor.lhs.false ]
-  %indvars.iv.next.454 = add nsw i64 %indvars.iv, 5
-  %tmp22 = trunc i64 %indvars.iv.next.454 to i32
-  %cmp1.5 = icmp eq i32 %tmp22, %K1
-  br i1 %cmp1.5, label %for.end, label %for.body.6
-
-; CHECK: Flow2:
-; CHECK: br i1 %{{[0-9]+}}, label %for.end, label %for.body
-
-; CHECK: for.body.6:
-; CHECK: br i1 %cmp5.6, label %if.then6.6, label %for.body.backedge
-for.body.6:                                       ; preds = %for.body.1
-  %indvars.iv.next.559 = add nsw i64 %indvars.iv, 6
-  %tmp26 = trunc i64 %indvars.iv.next.559 to i32
-  %sub4.6 = sub nsw i32 %tmp26, %tmp22
-  %cmp5.6 = icmp slt i32 %best_count.231, %sub4.6
-  br i1 %cmp5.6, label %if.then6.6, label %for.body.backedge
-
-; CHECK: if.then6.6
-; CHECK: br label %for.body.backedge
-if.then6.6:                                       ; preds = %for.body.6
-  %arrayidx8.6 = getelementptr inbounds float, float* %nr, i64 %indvars.iv.next.454
-  %tmp29 = load float, float* %arrayidx8.6, align 4
-  br label %for.body.backedge
-
-; CHECK: Flow3:
-; CHECK: br label %Flow2
-
-; CHECK: for.body.backedge:
-; CHECK: br label %Flow3
-for.body.backedge:                                ; preds = %if.then6.6, %for.body.6
-  %best_val.027.be = phi float [ %tmp29, %if.then6.6 ], [ %best_val.233, %for.body.6 ]
-  %best_count.025.be = phi i32 [ %sub4.6, %if.then6.6 ], [ %best_count.231, %for.body.6 ]
-  %indvars.iv.be = add nsw i64 %indvars.iv, 7
-  br label %for.body
-}
diff --git a/llvm/test/Transforms/StructurizeCFG/rebuild-ssa-infinite-loop.ll b/llvm/test/Transforms/StructurizeCFG/rebuild-ssa-infinite-loop.ll
deleted file mode 100644
index 9d3a84396cf..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/rebuild-ssa-infinite-loop.ll
+++ /dev/null
@@ -1,56 +0,0 @@
-; RUN: opt -o /dev/null -structurizecfg %s
-
-; The following function caused an infinite loop inside the structurizer's
-; rebuildSSA routine, where we were iterating over an instruction's uses while
-; modifying the use list, without taking care to do this safely.
-
-target triple = "amdgcn--"
-
-define amdgpu_vs void @wrapper(i32 inreg %arg, i32 %arg1) {
-main_body:
-  %tmp = add i32 %arg1, %arg
-  %tmp2 = call <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32> undef, i32 %tmp, i32 0, i1 false, i1 false)
-  %tmp3 = extractelement <4 x float> %tmp2, i32 1
-  %tmp4 = fptosi float %tmp3 to i32
-  %tmp5 = insertelement <2 x i32> undef, i32 %tmp4, i32 1
-  br label %loop11.i
-
-loop11.i:                                         ; preds = %endif46.i, %main_body
-  %tmp6 = phi i32 [ 0, %main_body ], [ %tmp14, %endif46.i ]
-  %tmp7 = icmp sgt i32 %tmp6, 999
-  br i1 %tmp7, label %main.exit, label %if16.i
-
-if16.i:                                           ; preds = %loop11.i
-  %tmp8 = call <4 x float> @llvm.amdgcn.image.load.v4f32.v2i32.v8i32(<2 x i32> %tmp5, <8 x i32> undef, i32 15, i1 true, i1 false, i1 false, i1 false)
-  %tmp9 = extractelement <4 x float> %tmp8, i32 0
-  %tmp10 = fcmp ult float 0.000000e+00, %tmp9
-  br i1 %tmp10, label %if28.i, label %endif46.i
-
-if28.i:                                           ; preds = %if16.i
-  %tmp11 = bitcast float %tmp9 to i32
-  %tmp12 = shl i32 %tmp11, 16
-  %tmp13 = bitcast i32 %tmp12 to float
-  br label %main.exit
-
-endif46.i:                                        ; preds = %if16.i
-  %tmp14 = add i32 %tmp6, 1
-  br label %loop11.i
-
-main.exit:                                        ; preds = %if28.i, %loop11.i
-  %tmp15 = phi float [ %tmp13, %if28.i ], [ 0x36F0800000000000, %loop11.i ]
-  call void @llvm.amdgcn.exp.f32(i32 32, i32 15, float %tmp15, float 0.000000e+00, float 0.000000e+00, float 0x36A0000000000000, i1 false, i1 false) #0
-  ret void
-}
-
-; Function Attrs: nounwind
-declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #0
-
-; Function Attrs: nounwind readnone
-declare <4 x float> @llvm.amdgcn.buffer.load.format.v4f32(<4 x i32>, i32, i32, i1, i1) #2
-
-; Function Attrs: nounwind readonly
-declare <4 x float> @llvm.amdgcn.image.load.v4f32.v2i32.v8i32(<2 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #2
-
-attributes #0 = { nounwind }
-attributes #1 = { nounwind readnone }
-attributes #2 = { nounwind readonly }
diff --git a/llvm/test/Transforms/StructurizeCFG/switch.ll b/llvm/test/Transforms/StructurizeCFG/switch.ll
deleted file mode 100644
index 316df57ea73..00000000000
--- a/llvm/test/Transforms/StructurizeCFG/switch.ll
+++ /dev/null
@@ -1,23 +0,0 @@
-; RUN: opt -S -structurizecfg %s -o - | FileCheck %s
-
-; The structurizecfg pass cannot handle switch instructions, so we need to
-; make sure the lower switch pass is always run before structurizecfg.
-
-; CHECK-LABEL: @switch
-define void @switch(i32 addrspace(1)* %out, i32 %cond) nounwind {
-entry:
-; CHECK: icmp
-  switch i32 %cond, label %done [ i32 0, label %zero]
-
-; CHECK: zero:
-zero:
-; CHECK: store i32 7, i32 addrspace(1)* %out
-  store i32 7, i32 addrspace(1)* %out
-; CHECK: br label %done
-  br label %done
-
-; CHECK: done:
-done:
-; CHECK: ret void
-  ret void
-}