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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-02-04 20:49:44 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-02-04 20:49:44 +0000 |
| commit | 071ec90b68e8d778de5b341a4d235e81da028689 (patch) | |
| tree | 9a1022c41140746aebd6b79f821449131174094c /llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll | |
| parent | 987b0943c8c48f3bc21328d2c5c10c942778eaff (diff) | |
| download | bcm5719-llvm-071ec90b68e8d778de5b341a4d235e81da028689.tar.gz bcm5719-llvm-071ec90b68e8d778de5b341a4d235e81da028689.zip | |
StructurizeCFG: Use a reverse post-order traversal
We were previously doing a post-order traversal and operating on the
list in reverse, however this would occasionaly cause backedges for
loops to be visited before some of the other blocks in the loop.
We know use a reverse post-order traversal, which avoids this issue.
The reverse post-order traversal is not completely ideal, so we need
to manually fixup the list to ensure that inner loop backedges are
visited before outer loop backedges.
llvm-svn: 228186
Diffstat (limited to 'llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll')
| -rw-r--r-- | llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll b/llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll index 8ebd47aefd1..668a1e99d81 100644 --- a/llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll +++ b/llvm/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll @@ -11,28 +11,29 @@ bb: bb3: ; preds = %bb7, %bb %tmp = phi i64 [ 0, %bb ], [ %tmp8, %bb7 ] %tmp4 = fcmp ult float %arg1, 3.500000e+00 -; CHECK: br i1 %tmp4, label %bb7, label %Flow +; CHECK: %0 = xor i1 %tmp4, true +; CHECK: br i1 %0, label %bb5, label %Flow br i1 %tmp4, label %bb7, label %bb5 -; CHECK: Flow: -; CHECK: br i1 %2, label %Flow1, label %bb3 - -; CHECK: Flow1: -; CHECK: br i1 %3, label %bb5, label %bb10 - ; CHECK: bb5: bb5: ; preds = %bb3 %tmp6 = fcmp olt float 0.000000e+00, %arg2 -; CHECK: br label %bb10 +; CHECK: br label %Flow br i1 %tmp6, label %bb10, label %bb7 +; CHECK: Flow: +; CHECK: br i1 %3, label %bb7, label %Flow1 + ; CHECK: bb7 bb7: ; preds = %bb5, %bb3 %tmp8 = add nuw nsw i64 %tmp, 1 %tmp9 = icmp slt i64 %tmp8, 5 -; CHECK: br label %Flow +; CHECK: br label %Flow1 br i1 %tmp9, label %bb3, label %bb10 +; CHECK: Flow1: +; CHECK: br i1 %7, label %bb10, label %bb3 + ; CHECK: bb10 bb10: ; preds = %bb7, %bb5 %tmp11 = phi i32 [ 15, %bb5 ], [ 255, %bb7 ] |
