summaryrefslogtreecommitdiffstats
path: root/llvm/test/Transforms/SimplifyCFG
diff options
context:
space:
mode:
authorRoman Lebedev <lebedev.ri@gmail.com>2019-07-22 22:08:55 +0000
committerRoman Lebedev <lebedev.ri@gmail.com>2019-07-22 22:08:55 +0000
commitfca23d74c963fd337c3d18fcf3b741ad21d62d4b (patch)
tree37a747a1e6762d1918b724299d64db19da57fabf /llvm/test/Transforms/SimplifyCFG
parent77d37037f00479dc6f7841e4549784f2b55d6f9f (diff)
downloadbcm5719-llvm-fca23d74c963fd337c3d18fcf3b741ad21d62d4b.tar.gz
bcm5719-llvm-fca23d74c963fd337c3d18fcf3b741ad21d62d4b.zip
[SimplifyCFG][NFC] Test that we fail to flatten CFG after forming @llvm.umul.with.overflow
Even if we formed @llvm.umul.with.overflow, we are still stuck with that guard against div-by-zero, which is no longer needed, because we didn't flatten the CFG. llvm-svn: 366749
Diffstat (limited to 'llvm/test/Transforms/SimplifyCFG')
-rw-r--r--llvm/test/Transforms/SimplifyCFG/unsigned-multiplication-will-overflow.ll38
1 files changed, 38 insertions, 0 deletions
diff --git a/llvm/test/Transforms/SimplifyCFG/unsigned-multiplication-will-overflow.ll b/llvm/test/Transforms/SimplifyCFG/unsigned-multiplication-will-overflow.ll
new file mode 100644
index 00000000000..0c02fba2ec9
--- /dev/null
+++ b/llvm/test/Transforms/SimplifyCFG/unsigned-multiplication-will-overflow.ll
@@ -0,0 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -simplifycfg -S | FileCheck %s
+
+; This is checking that the multiplication does overflow, with a leftover
+; guard against division-by-zero that was needed before InstCombine
+; produced llvm.umul.with.overflow.
+
+define i1 @will_overflow(i64 %size, i64 %nmemb) {
+; CHECK-LABEL: @will_overflow(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[SIZE:%.*]], 0
+; CHECK-NEXT: br i1 [[CMP]], label [[LAND_END:%.*]], label [[LAND_RHS:%.*]]
+; CHECK: land.rhs:
+; CHECK-NEXT: [[UMUL:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[SIZE]], i64 [[NMEMB:%.*]])
+; CHECK-NEXT: [[UMUL_OV:%.*]] = extractvalue { i64, i1 } [[UMUL]], 1
+; CHECK-NEXT: [[UMUL_NOT_OV:%.*]] = xor i1 [[UMUL_OV]], true
+; CHECK-NEXT: br label [[LAND_END]]
+; CHECK: land.end:
+; CHECK-NEXT: [[TMP0:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[UMUL_NOT_OV]], [[LAND_RHS]] ]
+; CHECK-NEXT: ret i1 [[TMP0]]
+;
+entry:
+ %cmp = icmp eq i64 %size, 0
+ br i1 %cmp, label %land.end, label %land.rhs
+
+land.rhs: ; preds = %entry
+ %umul = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %size, i64 %nmemb)
+ %umul.ov = extractvalue { i64, i1 } %umul, 1
+ %umul.not.ov = xor i1 %umul.ov, true
+ br label %land.end
+
+land.end: ; preds = %land.rhs, %entry
+ %0 = phi i1 [ true, %entry ], [ %umul.not.ov, %land.rhs ]
+ ret i1 %0
+}
+
+; Function Attrs: nounwind readnone speculatable
+declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #0
OpenPOWER on IntegriCloud