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| author | Sanjay Patel <spatel@rotateright.com> | 2017-04-12 15:11:33 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2017-04-12 15:11:33 +0000 |
| commit | 33439f982bd6650c8b42574ade840983962e28a9 (patch) | |
| tree | 992857407bc702cdf7a31b2de0880a13862d6d4d /llvm/test/Transforms/SimplifyCFG | |
| parent | 7184c44d66fdbe5876cf5c70f73cd1a76ef9628a (diff) | |
| download | bcm5719-llvm-33439f982bd6650c8b42574ade840983962e28a9.tar.gz bcm5719-llvm-33439f982bd6650c8b42574ade840983962e28a9.zip | |
[InstCombine] morph an existing instruction instead of creating a new one
One potential way to make InstCombine (very slightly?) faster is to recycle instructions
when possible instead of creating new ones. It's not explicitly stated AFAIK, but we don't
consider this an "InstSimplify". We could, however, make a new layer to house transforms
like this if that makes InstCombine more manageable (just throwing out an idea; not sure
how much opportunity is actually here).
Differential Revision: https://reviews.llvm.org/D31863
llvm-svn: 300067
Diffstat (limited to 'llvm/test/Transforms/SimplifyCFG')
| -rw-r--r-- | llvm/test/Transforms/SimplifyCFG/merge-cond-stores.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/Transforms/SimplifyCFG/merge-cond-stores.ll b/llvm/test/Transforms/SimplifyCFG/merge-cond-stores.ll index baec5244219..d5d0224a4b2 100644 --- a/llvm/test/Transforms/SimplifyCFG/merge-cond-stores.ll +++ b/llvm/test/Transforms/SimplifyCFG/merge-cond-stores.ll @@ -5,8 +5,8 @@ define void @test_simple(i32* %p, i32 %a, i32 %b) { ; CHECK-LABEL: @test_simple( ; CHECK-NEXT: entry: -; CHECK-NEXT: [[X2:%.*]] = icmp eq i32 [[B:%.*]], 0 ; CHECK-NEXT: [[TMP0:%.*]] = icmp ne i32 [[A:%.*]], 0 +; CHECK-NEXT: [[X2:%.*]] = icmp eq i32 [[B:%.*]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[X2]], true ; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[TMP0]], [[TMP1]] ; CHECK-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[TMP4:%.*]] @@ -43,8 +43,8 @@ define void @test_recursive(i32* %p, i32 %a, i32 %b, i32 %c, i32 %d) { ; CHECK-NEXT: [[TMP0:%.*]] = or i32 [[B:%.*]], [[A:%.*]] ; CHECK-NEXT: [[X4:%.*]] = icmp eq i32 [[D:%.*]], 0 ; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[TMP0]], [[C:%.*]] -; CHECK-NEXT: [[TMP2:%.*]] = xor i1 [[X4]], true ; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP1]], 0 +; CHECK-NEXT: [[TMP2:%.*]] = xor i1 [[X4]], true ; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP3]], [[TMP2]] ; CHECK-NEXT: br i1 [[TMP4]], label [[TMP5:%.*]], label [[TMP6:%.*]] ; CHECK: [[X3:%.*]] = icmp eq i32 [[C]], 0 |
