diff options
| author | Evgeniy Stepanov <eugeni.stepanov@gmail.com> | 2015-10-26 18:28:25 +0000 |
|---|---|---|
| committer | Evgeniy Stepanov <eugeni.stepanov@gmail.com> | 2015-10-26 18:28:25 +0000 |
| commit | d1aad265891cf58b4c16c532d3578c4bbbb297ff (patch) | |
| tree | 2d41a44c771e19df9068fc81db056e1344558137 /llvm/test/Transforms/SafeStack | |
| parent | 693499cefc75f095a6afae64fcf25137fb309f91 (diff) | |
| download | bcm5719-llvm-d1aad265891cf58b4c16c532d3578c4bbbb297ff.tar.gz bcm5719-llvm-d1aad265891cf58b4c16c532d3578c4bbbb297ff.zip | |
[safestack] Fast access to the unsafe stack pointer on AArch64/Android.
Android libc provides a fixed TLS slot for the unsafe stack pointer,
and this change implements direct access to that slot on AArch64 via
__builtin_thread_pointer() + offset.
This change also moves more code into TargetLowering and its
target-specific subclasses to get rid of target-specific codegen
in SafeStackPass.
This change does not touch the ARM backend because ARM lowers
builting_thread_pointer as aeabi_read_tp, which is not available
on Android.
The previous iteration of this change was reverted in r250461. This
version leaves the generic, compiler-rt based implementation in
SafeStack.cpp instead of moving it to TargetLoweringBase in order to
allow testing without a TargetMachine.
llvm-svn: 251324
Diffstat (limited to 'llvm/test/Transforms/SafeStack')
| -rw-r--r-- | llvm/test/Transforms/SafeStack/AArch64/abi.ll | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/test/Transforms/SafeStack/AArch64/abi.ll b/llvm/test/Transforms/SafeStack/AArch64/abi.ll index 942658a89d2..cdec923eb74 100644 --- a/llvm/test/Transforms/SafeStack/AArch64/abi.ll +++ b/llvm/test/Transforms/SafeStack/AArch64/abi.ll @@ -3,7 +3,9 @@ define void @foo() nounwind uwtable safestack { entry: -; CHECK: %[[SPA:.*]] = call i8** @__safestack_pointer_address() +; CHECK: %[[TP:.*]] = call i8* @llvm.aarch64.thread.pointer() +; CHECK: %[[SPA0:.*]] = getelementptr i8, i8* %[[TP]], i32 72 +; CHECK: %[[SPA:.*]] = bitcast i8* %[[SPA0]] to i8** ; CHECK: %[[USP:.*]] = load i8*, i8** %[[SPA]] ; CHECK: %[[USST:.*]] = getelementptr i8, i8* %[[USP]], i32 -16 ; CHECK: store i8* %[[USST]], i8** %[[SPA]] |
