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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-09-18 20:25:41 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-09-18 20:25:41 +0000 |
| commit | 34032cba1418b77c6a17fc4434b60a46e2f1e562 (patch) | |
| tree | c9b8b2070ab7b336e8f14b7a1f022ff2e0660d95 /llvm/test/Transforms/SLPVectorizer/X86/sqrt.ll | |
| parent | cc03165d3f77f1d9d19142326a59c5ef24c65364 (diff) | |
| download | bcm5719-llvm-34032cba1418b77c6a17fc4434b60a46e2f1e562.tar.gz bcm5719-llvm-34032cba1418b77c6a17fc4434b60a46e2f1e562.zip | |
Rename tests
llvm-svn: 281863
Diffstat (limited to 'llvm/test/Transforms/SLPVectorizer/X86/sqrt.ll')
| -rw-r--r-- | llvm/test/Transforms/SLPVectorizer/X86/sqrt.ll | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/sqrt.ll b/llvm/test/Transforms/SLPVectorizer/X86/sqrt.ll index 00339d0de24..06d2134fb57 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/sqrt.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/sqrt.ll @@ -19,8 +19,8 @@ declare double @llvm.sqrt.f64(double) ; SQRT ; -define void @fma_2f64() #0 { -; CHECK-LABEL: @fma_2f64( +define void @sqrt_2f64() #0 { +; CHECK-LABEL: @sqrt_2f64( ; CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* bitcast ([8 x double]* @src64 to <2 x double>*), align 8 ; CHECK-NEXT: [[TMP2:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> [[TMP1]]) ; CHECK-NEXT: store <2 x double> [[TMP2]], <2 x double>* bitcast ([8 x double]* @dst64 to <2 x double>*), align 8 @@ -35,8 +35,8 @@ define void @fma_2f64() #0 { ret void } -define void @fma_4f64() #0 { -; SSE-LABEL: @fma_4f64( +define void @sqrt_4f64() #0 { +; SSE-LABEL: @sqrt_4f64( ; SSE-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* bitcast ([8 x double]* @src64 to <2 x double>*), align 8 ; SSE-NEXT: [[TMP2:%.*]] = load <2 x double>, <2 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @src64, i32 0, i64 2) to <2 x double>*), align 8 ; SSE-NEXT: [[TMP3:%.*]] = call <2 x double> @llvm.sqrt.v2f64(<2 x double> [[TMP1]]) @@ -45,7 +45,7 @@ define void @fma_4f64() #0 { ; SSE-NEXT: store <2 x double> [[TMP4]], <2 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64 2) to <2 x double>*), align 8 ; SSE-NEXT: ret void ; -; AVX-LABEL: @fma_4f64( +; AVX-LABEL: @sqrt_4f64( ; AVX-NEXT: [[TMP1:%.*]] = load <4 x double>, <4 x double>* bitcast ([8 x double]* @src64 to <4 x double>*), align 8 ; AVX-NEXT: [[TMP2:%.*]] = call <4 x double> @llvm.sqrt.v4f64(<4 x double> [[TMP1]]) ; AVX-NEXT: store <4 x double> [[TMP2]], <4 x double>* bitcast ([8 x double]* @dst64 to <4 x double>*), align 8 @@ -66,8 +66,8 @@ define void @fma_4f64() #0 { ret void } -define void @fma_8f64() #0 { -; SSE-LABEL: @fma_8f64( +define void @sqrt_8f64() #0 { +; SSE-LABEL: @sqrt_8f64( ; SSE-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* bitcast ([8 x double]* @src64 to <2 x double>*), align 4 ; SSE-NEXT: [[TMP2:%.*]] = load <2 x double>, <2 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @src64, i32 0, i64 2) to <2 x double>*), align 4 ; SSE-NEXT: [[TMP3:%.*]] = load <2 x double>, <2 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @src64, i32 0, i64 4) to <2 x double>*), align 4 @@ -82,7 +82,7 @@ define void @fma_8f64() #0 { ; SSE-NEXT: store <2 x double> [[TMP8]], <2 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64 6) to <2 x double>*), align 4 ; SSE-NEXT: ret void ; -; AVX256-LABEL: @fma_8f64( +; AVX256-LABEL: @sqrt_8f64( ; AVX256-NEXT: [[TMP1:%.*]] = load <4 x double>, <4 x double>* bitcast ([8 x double]* @src64 to <4 x double>*), align 4 ; AVX256-NEXT: [[TMP2:%.*]] = load <4 x double>, <4 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @src64, i32 0, i64 4) to <4 x double>*), align 4 ; AVX256-NEXT: [[TMP3:%.*]] = call <4 x double> @llvm.sqrt.v4f64(<4 x double> [[TMP1]]) @@ -91,7 +91,7 @@ define void @fma_8f64() #0 { ; AVX256-NEXT: store <4 x double> [[TMP4]], <4 x double>* bitcast (double* getelementptr inbounds ([8 x double], [8 x double]* @dst64, i32 0, i64 4) to <4 x double>*), align 4 ; AVX256-NEXT: ret void ; -; AVX512-LABEL: @fma_8f64( +; AVX512-LABEL: @sqrt_8f64( ; AVX512-NEXT: [[TMP1:%.*]] = load <8 x double>, <8 x double>* bitcast ([8 x double]* @src64 to <8 x double>*), align 4 ; AVX512-NEXT: [[TMP2:%.*]] = call <8 x double> @llvm.sqrt.v8f64(<8 x double> [[TMP1]]) ; AVX512-NEXT: store <8 x double> [[TMP2]], <8 x double>* bitcast ([8 x double]* @dst64 to <8 x double>*), align 4 @@ -124,8 +124,8 @@ define void @fma_8f64() #0 { ret void } -define void @fma_4f32() #0 { -; CHECK-LABEL: @fma_4f32( +define void @sqrt_4f32() #0 { +; CHECK-LABEL: @sqrt_4f32( ; CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, <4 x float>* bitcast ([16 x float]* @src32 to <4 x float>*), align 4 ; CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP1]]) ; CHECK-NEXT: store <4 x float> [[TMP2]], <4 x float>* bitcast ([16 x float]* @dst32 to <4 x float>*), align 4 @@ -146,8 +146,8 @@ define void @fma_4f32() #0 { ret void } -define void @fma_8f32() #0 { -; SSE-LABEL: @fma_8f32( +define void @sqrt_8f32() #0 { +; SSE-LABEL: @sqrt_8f32( ; SSE-NEXT: [[TMP1:%.*]] = load <4 x float>, <4 x float>* bitcast ([16 x float]* @src32 to <4 x float>*), align 4 ; SSE-NEXT: [[TMP2:%.*]] = load <4 x float>, <4 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @src32, i32 0, i64 4) to <4 x float>*), align 4 ; SSE-NEXT: [[TMP3:%.*]] = call <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP1]]) @@ -156,7 +156,7 @@ define void @fma_8f32() #0 { ; SSE-NEXT: store <4 x float> [[TMP4]], <4 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @dst32, i32 0, i64 4) to <4 x float>*), align 4 ; SSE-NEXT: ret void ; -; AVX-LABEL: @fma_8f32( +; AVX-LABEL: @sqrt_8f32( ; AVX-NEXT: [[TMP1:%.*]] = load <8 x float>, <8 x float>* bitcast ([16 x float]* @src32 to <8 x float>*), align 4 ; AVX-NEXT: [[TMP2:%.*]] = call <8 x float> @llvm.sqrt.v8f32(<8 x float> [[TMP1]]) ; AVX-NEXT: store <8 x float> [[TMP2]], <8 x float>* bitcast ([16 x float]* @dst32 to <8 x float>*), align 4 @@ -189,8 +189,8 @@ define void @fma_8f32() #0 { ret void } -define void @fma_16f32() #0 { -; SSE-LABEL: @fma_16f32( +define void @sqrt_16f32() #0 { +; SSE-LABEL: @sqrt_16f32( ; SSE-NEXT: [[TMP1:%.*]] = load <4 x float>, <4 x float>* bitcast ([16 x float]* @src32 to <4 x float>*), align 4 ; SSE-NEXT: [[TMP2:%.*]] = load <4 x float>, <4 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @src32, i32 0, i64 4) to <4 x float>*), align 4 ; SSE-NEXT: [[TMP3:%.*]] = load <4 x float>, <4 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @src32, i32 0, i64 8) to <4 x float>*), align 4 @@ -205,7 +205,7 @@ define void @fma_16f32() #0 { ; SSE-NEXT: store <4 x float> [[TMP8]], <4 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @dst32, i32 0, i64 12) to <4 x float>*), align 4 ; SSE-NEXT: ret void ; -; AVX256-LABEL: @fma_16f32( +; AVX256-LABEL: @sqrt_16f32( ; AVX256-NEXT: [[TMP1:%.*]] = load <8 x float>, <8 x float>* bitcast ([16 x float]* @src32 to <8 x float>*), align 4 ; AVX256-NEXT: [[TMP2:%.*]] = load <8 x float>, <8 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @src32, i32 0, i64 8) to <8 x float>*), align 4 ; AVX256-NEXT: [[TMP3:%.*]] = call <8 x float> @llvm.sqrt.v8f32(<8 x float> [[TMP1]]) @@ -214,7 +214,7 @@ define void @fma_16f32() #0 { ; AVX256-NEXT: store <8 x float> [[TMP4]], <8 x float>* bitcast (float* getelementptr inbounds ([16 x float], [16 x float]* @dst32, i32 0, i64 8) to <8 x float>*), align 4 ; AVX256-NEXT: ret void ; -; AVX512-LABEL: @fma_16f32( +; AVX512-LABEL: @sqrt_16f32( ; AVX512-NEXT: [[TMP1:%.*]] = load <16 x float>, <16 x float>* bitcast ([16 x float]* @src32 to <16 x float>*), align 4 ; AVX512-NEXT: [[TMP2:%.*]] = call <16 x float> @llvm.sqrt.v16f32(<16 x float> [[TMP1]]) ; AVX512-NEXT: store <16 x float> [[TMP2]], <16 x float>* bitcast ([16 x float]* @dst32 to <16 x float>*), align 4 |

