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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-04 13:53:51 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-04 13:53:51 +0000 |
| commit | f1e668830fcb0e59f08fb3b544b93a63a8be7bcc (patch) | |
| tree | 519248fc09c9c1d4210b175adabe41be2bd1bcac /llvm/test/Transforms/SLPVectorizer/X86/jumbled-load-shuffle-placement.ll | |
| parent | 1728fee6c37ba5bc31fa384e6f33780ddde1165c (diff) | |
| download | bcm5719-llvm-f1e668830fcb0e59f08fb3b544b93a63a8be7bcc.tar.gz bcm5719-llvm-f1e668830fcb0e59f08fb3b544b93a63a8be7bcc.zip | |
[SLPVectorizer][X86] Regenerate some tests. NFCI
llvm-svn: 329196
Diffstat (limited to 'llvm/test/Transforms/SLPVectorizer/X86/jumbled-load-shuffle-placement.ll')
| -rw-r--r-- | llvm/test/Transforms/SLPVectorizer/X86/jumbled-load-shuffle-placement.ll | 31 |
1 files changed, 15 insertions, 16 deletions
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/jumbled-load-shuffle-placement.ll b/llvm/test/Transforms/SLPVectorizer/X86/jumbled-load-shuffle-placement.ll index 5fc0298b6ce..7856b7bd6b0 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/jumbled-load-shuffle-placement.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/jumbled-load-shuffle-placement.ll @@ -1,7 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -S -mtriple=x86_64-unknown -mattr=+avx -slp-vectorizer | FileCheck %s - ;void jumble (int * restrict A, int * restrict B) { ; int tmp0 = A[10]*A[0]; ; int tmp1 = A[11]*A[1]; @@ -13,9 +12,8 @@ ; B[3] = tmp3; ;} - - ; Function Attrs: norecurse nounwind uwtable - define void @jumble1(i32* noalias nocapture readonly %A, i32* noalias nocapture %B) { +; Function Attrs: norecurse nounwind uwtable +define void @jumble1(i32* noalias nocapture readonly %A, i32* noalias nocapture %B) { ; CHECK-LABEL: @jumble1( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 10 @@ -29,13 +27,13 @@ ; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 2 ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[A]] to <4 x i32>* ; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 2> -; CHECK-NEXT: [[TMP5:%.*]] = mul nsw <4 x i32> [[TMP1]], [[TMP4]] +; CHECK-NEXT: [[REORDER_SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 2> +; CHECK-NEXT: [[TMP4:%.*]] = mul nsw <4 x i32> [[TMP1]], [[REORDER_SHUFFLE]] ; CHECK-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 1 ; CHECK-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 2 ; CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 3 -; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32* [[B]] to <4 x i32>* -; CHECK-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP6]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32* [[B]] to <4 x i32>* +; CHECK-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP5]], align 4 ; CHECK-NEXT: ret void ; entry: @@ -66,11 +64,12 @@ entry: %arrayidx14 = getelementptr inbounds i32, i32* %B, i64 3 store i32 %mul10, i32* %arrayidx14, align 4 ret void - } +} ;Reversing the operand of MUL - ; Function Attrs: norecurse nounwind uwtable - define void @jumble2(i32* noalias nocapture readonly %A, i32* noalias nocapture %B) { + +; Function Attrs: norecurse nounwind uwtable +define void @jumble2(i32* noalias nocapture readonly %A, i32* noalias nocapture %B) { ; CHECK-LABEL: @jumble2( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 10 @@ -84,13 +83,13 @@ entry: ; CHECK-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 2 ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32* [[A]] to <4 x i32>* ; CHECK-NEXT: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[TMP2]], align 4 -; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 2> -; CHECK-NEXT: [[TMP5:%.*]] = mul nsw <4 x i32> [[TMP4]], [[TMP1]] +; CHECK-NEXT: [[REORDER_SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 3, i32 2> +; CHECK-NEXT: [[TMP4:%.*]] = mul nsw <4 x i32> [[REORDER_SHUFFLE]], [[TMP1]] ; CHECK-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 1 ; CHECK-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 2 ; CHECK-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 3 -; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32* [[B]] to <4 x i32>* -; CHECK-NEXT: store <4 x i32> [[TMP5]], <4 x i32>* [[TMP6]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = bitcast i32* [[B]] to <4 x i32>* +; CHECK-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP5]], align 4 ; CHECK-NEXT: ret void ; entry: @@ -121,5 +120,5 @@ entry: %arrayidx14 = getelementptr inbounds i32, i32* %B, i64 3 store i32 %mul10, i32* %arrayidx14, align 4 ret void - } +} |
