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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-03-25 15:53:55 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-03-25 15:53:55 +0000 |
| commit | ff3abef395097f7c068dac6feae42c53b7d1e26e (patch) | |
| tree | 6c5d87814a8fa6dc5248b4eabdef19b0c88a494f /llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll | |
| parent | ae3fefe3978237a8b71a6a08a11caab4485b87a4 (diff) | |
| download | bcm5719-llvm-ff3abef395097f7c068dac6feae42c53b7d1e26e.tar.gz bcm5719-llvm-ff3abef395097f7c068dac6feae42c53b7d1e26e.zip | |
[SLPVectorizer] reorderInputsAccordingToOpcode - remove non-Instruction canonicalization
Remove attempts to commute non-Instructions to the LHS - the codegen changes appear to rely on chance more than anything else and also have a tendency to fight existing instcombine canonicalization which moves constants to the RHS of commutable binary ops.
This is prep work towards:
(a) reusing reorderInputsAccordingToOpcode for alt-shuffles and removing the similar reorderAltShuffleOperands
(b) improving reordering to optimized cases with commutable and non-commutable instructions to still find splat/consecutive ops.
Differential Revision: https://reviews.llvm.org/D59738
llvm-svn: 356913
Diffstat (limited to 'llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll')
| -rw-r--r-- | llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll b/llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll index ec29f8413ac..c16ac538559 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/compare-reduce.ll @@ -20,8 +20,8 @@ define void @reduce_compare(double* nocapture %A, i32 %n) { ; CHECK-NEXT: [[TMP3:%.*]] = bitcast double* [[ARRAYIDX]] to <2 x double>* ; CHECK-NEXT: [[TMP4:%.*]] = load <2 x double>, <2 x double>* [[TMP3]], align 8 ; CHECK-NEXT: [[TMP5:%.*]] = fmul <2 x double> [[TMP1]], [[TMP4]] -; CHECK-NEXT: [[TMP6:%.*]] = fmul <2 x double> <double 7.000000e+00, double 4.000000e+00>, [[TMP5]] -; CHECK-NEXT: [[TMP7:%.*]] = fadd <2 x double> <double 5.000000e+00, double 9.000000e+00>, [[TMP6]] +; CHECK-NEXT: [[TMP6:%.*]] = fmul <2 x double> [[TMP5]], <double 7.000000e+00, double 4.000000e+00> +; CHECK-NEXT: [[TMP7:%.*]] = fadd <2 x double> [[TMP6]], <double 5.000000e+00, double 9.000000e+00> ; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x double> [[TMP7]], i32 0 ; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x double> [[TMP7]], i32 1 ; CHECK-NEXT: [[CMP11:%.*]] = fcmp ogt double [[TMP8]], [[TMP9]] |
